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公开(公告)号:US20230352509A1
公开(公告)日:2023-11-02
申请号:US18067393
申请日:2022-12-16
发明人: Seonghoon KO , Jae Ho KIM , Uihui KWON , Wook LEE
IPC分类号: H01L27/146
CPC分类号: H01L27/1463 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/14683
摘要: An image sensor includes a substrate including first and second pixel regions adjacent to each other, the substrate including first and second surfaces opposite to each other, a pixel isolation pattern in the substrate to define the first and second pixel regions, a transfer gate on the first surface of the substrate of the first pixel region, a floating diffusion region adjacent to a side of the transfer gate, a first ground dopant region adjacent to the first surface of the substrate in the first pixel region, and a second ground dopant region adjacent to the first surface of the substrate in the second pixel region. A bottom surface of the first ground dopant region is located at a lower level than a bottom surface of the floating diffusion region.
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公开(公告)号:US20220376119A1
公开(公告)日:2022-11-24
申请号:US17585284
申请日:2022-01-26
发明人: Jaehyun YOO , Kyuok LEE , Uihui KWON , Junhyeok KIM , Yongwoo JEON , Dawon JEONG , Jaehyok KO
IPC分类号: H01L29/861 , H01L29/40 , H01L29/06
摘要: A semiconductor protection device includes: an N-type epitaxial layer, a device isolation layer disposed in the N-type epitaxial layer, an N-type drift region disposed below the device isolation layer, an N-type well disposed in the N-type drift region, first and second P-type drift regions, respectively disposed to be in contact with the device isolation layer, and spaced apart from the N-type drift region, first and second P-type doped regions, respectively disposed in the first and second P-type drift regions, first and second N-type floating wells, respectively disposed in the first and second P-type drift regions to be spaced apart from the first and second P-type doped regions, and disposed to be in contact with the device isolation layer, and first and second contact layer, respectively disposed to cover the first and second N-type floating well, to be in contact with the device isolation layer.
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公开(公告)号:US20210063999A1
公开(公告)日:2021-03-04
申请号:US16992919
申请日:2020-08-13
发明人: Jaeho KIM , Kanghyun Baek , Kwanghee LEE , Yongwoo Jeon , Uihui KWON , Yoonsuk Kim
IPC分类号: G05B19/4097 , G06N20/00
摘要: A method of guiding a semiconductor manufacturing process includes receiving semiconductor manufacturing process data corresponding to a target semiconductor product, generating first semiconductor characteristic data corresponding to the semiconductor manufacturing process data by using a technology computer-aided design (TCAD) model trained through machine learning based on training data including TCAD simulation data, generating second semiconductor characteristic data corresponding to the semiconductor manufacturing process data by using a compact model generated based on information of measurement of at least one semiconductor characteristic of a first semiconductor product, generating, based on the first semiconductor characteristic data and the second semiconductor characteristic data, a plurality of process policies respectively corresponding to a plurality of strategic references, by using a plurality of strategy models; and providing a final process policy corresponding to the target semiconductor product based on the plurality of process policies.
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公开(公告)号:US20240113182A1
公开(公告)日:2024-04-04
申请号:US18538575
申请日:2023-12-13
发明人: Yonghee PARK , Myunggil KANG , Uihui KWON , Seungkyu KIM , Ahyoung KIM , Ahyoung KIM , Youngseok SONG
IPC分类号: H01L29/417 , H01L27/088 , H01L29/06 , H01L29/423 , H01L29/786
CPC分类号: H01L29/41775 , H01L27/088 , H01L29/0665 , H01L29/42392 , H01L29/78696
摘要: An integrated circuit device includes a fin-type active region disposed on a substrate and extending in a first horizontal direction, a gate line disposed on the fin-type active region and extending in a second horizontal direction intersecting the first horizontal direction, the gate line including, a connection protrusion portion including a protrusion top surface at a first vertical level from the substrate, and a main gate portion including a recess top surface extending in the second horizontal direction from the connection protrusion portion, the recess top surface being at a second vertical level lower than the first vertical level, a gate contact disposed on the gate line and connected to the connection protrusion portion, a source/drain region disposed on the fin-type active region and disposed adjacent to the gate line, and a source/drain contact disposed on the source/drain region.
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公开(公告)号:US20220165857A1
公开(公告)日:2022-05-26
申请号:US17352973
申请日:2021-06-21
发明人: Yonghee PARK , Myunggil KANG , Uihui KWON , Seungkyu KIM , Ahyoung KIM , Youngseok SONG
IPC分类号: H01L29/417 , H01L29/06 , H01L29/423 , H01L29/786 , H01L27/088
摘要: An integrated circuit device includes a fin-type active region disposed on a substrate and extending in a first horizontal direction, a gate line disposed on the fin-type active region and extending in a second horizontal direction intersecting the first horizontal direction, the gate line including, a connection protrusion portion including a protrusion top surface at a first vertical level from the substrate, and a main gate portion including a recess top surface extending in the second horizontal direction from the connection protrusion portion, the recess top surface being at a second vertical level lower than the first vertical level, a gate contact disposed on the gate line and connected to the connection protrusion portion, a source/drain region disposed on the fin-type active region and disposed adjacent to the gate line, and a source/drain contact disposed on the source/drain region.
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公开(公告)号:US20140332863A1
公开(公告)日:2014-11-13
申请号:US14248594
申请日:2014-04-09
发明人: JaeHoo PARK , Daewon HA , Uihui KWON , Sung-Dae SUK
CPC分类号: H01L29/785 , H01L27/092 , H01L29/66795 , H01L29/7853
摘要: Provided are a semiconductor device and a method of manufacturing the same. The method of manufacturing a semiconductor device includes forming an active fin on a substrate; oxidizing a portion of the active fin to form an insulating pattern between the active fin and the substrate; forming a first gate pattern on the substrate, wherein the first gate pattern crosses the active fin; exposing the substrate on both sides of the first gate pattern; and forming source/drain regions on the exposed substrate.
摘要翻译: 提供半导体器件及其制造方法。 制造半导体器件的方法包括:在衬底上形成有源散热片; 氧化活性鳍片的一部分以在活性鳍片和衬底之间形成绝缘图案; 在所述衬底上形成第一栅极图案,其中所述第一栅极图案与所述有源鳍片交叉; 在第一栅极图案的两侧上暴露衬底; 以及在暴露的衬底上形成源极/漏极区域。
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