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    IMAGE PROCESSING DEVICE FOR CONTROLLING PIXEL OUTPUT LEVEL AND OPERATING METHOD THEREOF
    2.
    发明申请
    IMAGE PROCESSING DEVICE FOR CONTROLLING PIXEL OUTPUT LEVEL AND OPERATING METHOD THEREOF 有权

    公开(公告)号：US20250063269A1

    公开(公告)日：2025-02-20

    申请号：US18937826

    申请日：2024-11-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： JAEYOUNG BAE ,  SUNYOOL KANG ,  HAESICK SUL ,  SUYONG KIM

    IPC: H04N25/75 ,  H01L27/146 ,  H04N25/709 ,  H04N25/71 ,  H04N25/77 ,  H04N25/79

    Abstract: An image sensor includes a pixel array that includes a first pixel group located in a first row and including a first select transistor and a first floating diffusion region, a second pixel group located in a second row and including a second select transistor and a second floating diffusion region, and a column line connected to both the first pixel group and the second pixel group. While charges generated by a photoelectric conversion element of the first pixel group are transferred to the first floating diffusion region, the first select transistor is turned off, the second select transistor is turned on, and a first voltage is applied to the column line through the second select transistor. A photoelectric conversion element of the second pixel group generates charges prior to the photoelectric conversion element of the first pixel group, so as to be transferred to the second floating diffusion region.

    IMAGE SENSORS INCLUDING SHIELDING STRUCTURES
    3.
    发明申请
    IMAGE SENSORS INCLUDING SHIELDING STRUCTURES 审中-公开

    公开(公告)号：US20170257582A1

    公开(公告)日：2017-09-07

    申请号：US15434605

    申请日：2017-02-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： YUNHWAN JUNG ,  SUNYOOL KANG ,  KYOUNGMIN KOH ,  SEUNGJIN LEE

    IPC: H04N5/357 ,  H04N5/374 ,  H04N5/378

    CPC classification number: H04N5/3577 ,  H04N5/374 ,  H04N5/378 ,  H04N9/045

    Abstract: An image sensor includes first pixels and second pixels arranged in alternating order along a first direction, first output lines extending in a second direction that is perpendicular to the first direction and respectively connected to the first pixels, second output lines extending in the second direction and respectively connected to the second pixels, first analog circuit blocks and second analog circuit blocks arranged in alternating order along the first direction, and shielding structures disposed each between adjacent ones of the first and second analog circuit blocks. Each of the first analog circuit blocks includes a plurality of first analog circuits respectively connected to the first output lines. Each of the second analog circuit blocks includes a plurality of second analog circuits respectively connected to the second output lines.

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