公开(公告)号：US20230328990A1

公开(公告)日：2023-10-12

申请号：US18333886

申请日：2023-06-13

申请人： Samsung Electronics Co., Ltd.

发明人： Sangjae Lee ,  Jaehyung Kim ,  Dongseog Eun

IPC分类号： H10B43/27 ,  H10B43/35 ,  H10B43/40

CPC分类号： H10B43/27 ,  H10B43/40 ,  H10B43/35

摘要： A semiconductor device includes an upper stack structure extending on a lower stack structure, which extends on an underlying substrate. A channel structure extends through the upper stack structure and the lower stack structure. The lower stack structure includes a first lower electrode layer disposed adjacent to an interface between the lower stack structure and the upper stack structure, and a second lower electrode layer disposed adjacent a center of the lower stack structure. The upper stack structure includes a first upper electrode layer disposed adjacent to the interface, and a second upper electrode layer disposed adjacent a center of the upper stack structure. At least one of the first lower electrode layer and the first upper electrode layer is thicker than the second lower electrode layer. At least one insulating layer is disposed between the first lower electrode layer and the first upper electrode layer.

公开(公告)号：US20210242235A1

公开(公告)日：2021-08-05

申请号：US16985024

申请日：2020-08-04

申请人： Samsung Electronics Co., Ltd.

发明人： Sangjae Lee ,  Jaehyung Kim ,  Dongseog Eun

IPC分类号： H01L27/11582 ,  H01L27/1157 ,  H01L27/11573

摘要： A semiconductor device includes an upper stack structure extending on a lower stack structure, which extends on an underlying substrate. A channel structure extends through the upper stack structure and the lower stack structure. The lower stack structure includes a first lower electrode layer disposed adjacent to an interface between the lower stack structure and the upper stack structure, and a second lower electrode layer disposed adjacent a center of the lower stack structure. The upper stack structure includes a first upper electrode layer disposed adjacent to the interface, and a second upper electrode layer disposed adjacent a center of the upper stack structure. At least one of the first lower electrode layer and the first upper electrode layer is thicker than the second lower electrode layer. At least one insulating layer is disposed between the first lower electrode layer and the first upper electrode layer.

公开(公告)号：US20240355735A1

公开(公告)日：2024-10-24

申请号：US18419856

申请日：2024-01-23

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Hyemi LEE ,  Seungyoon Kim ,  Heesuk Kim ,  Sangjae Lee ,  Jaehoon Lee ,  Juyoung Lim ,  Minkyu Chung ,  Sanghun Chun ,  Jeehoon Han

IPC分类号： H01L23/528 ,  H01L23/522 ,  H01L25/065 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00

CPC分类号： H01L23/5283 ,  H01L23/5226 ,  H01L25/0652 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00 ,  H01L2225/06506

摘要： A semiconductor device includes a plate layer, gate electrodes and interlayer insulating layers alternately stacked on the plate layer in a first direction perpendicular to an upper surface of the plate layer and forming a first stack structure and a second stack structure on the first stack structure, a channel structure penetrating through the gate electrodes and extending in the first direction, and a contact plug extending in the first direction and electrically connected to one of the gate electrodes, wherein the second stack structure includes a first gate electrode on a lowermost portion, a first interlayer insulating layer on the first gate electrode, and a second interlayer insulating layer on the first interlayer insulating layer, and the first interlayer insulating layer has a first thickness, and the second interlayer insulating layer has a second thickness smaller than the first thickness.

公开(公告)号：US11716844B2

公开(公告)日：2023-08-01

申请号：US16985024

申请日：2020-08-04

申请人： Samsung Electronics Co., Ltd.

发明人： Sangjae Lee ,  Jaehyung Kim ,  Dongseog Eun

IPC分类号： H10B43/27 ,  H10B43/35 ,  H10B43/40

CPC分类号： H10B43/27 ,  H10B43/35 ,  H10B43/40

摘要： A semiconductor device includes an upper stack structure extending on a lower stack structure, which extends on an underlying substrate. A channel structure extends through the upper stack structure and the lower stack structure. The lower stack structure includes a first lower electrode layer disposed adjacent to an interface between the lower stack structure and the upper stack structure, and a second lower electrode layer disposed adjacent a center of the lower stack structure. The upper stack structure includes a first upper electrode layer disposed adjacent to the interface, and a second upper electrode layer disposed adjacent a center of the upper stack structure. At least one of the first lower electrode layer and the first upper electrode layer is thicker than the second lower electrode layer. At least one insulating layer is disposed between the first lower electrode layer and the first upper electrode layer.