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公开(公告)号：US20210067150A1
公开(公告)日：2021-03-04
申请号：US16855593
申请日：2020-04-22
发明人： Jaehoon Lee , Yong Lim , Wan Kim , Barosaim Sung , Seunghyun Oh
摘要： A comparator configured to calibrate an offset according to a control signal, including an input circuit configured to receive a first input signal and a second input signal, and to generate a first internal signal corresponding to the first input signal and a second internal signal corresponding to the second input signal; a differential amplification circuit configured to consume a supply current flowing from a positive voltage node having a positive supply voltage to a negative voltage node having a negative supply voltage, and to generate an output signal by amplifying a difference between the first internal signal and the second internal signal; and a current valve configured to adjust at least a portion of the supply current based on the control signal.
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公开(公告)号：US20240098990A1
公开(公告)日：2024-03-21
申请号：US18127404
申请日：2023-03-28
发明人： Sung-Min Hwang , Jaehoon Lee , Seunghyun Cho , Jae-Joo Shim , Dong-Sik Lee
IPC分类号： H01L29/76 , H01L23/528
CPC分类号： H10B41/27 , H01L23/5283 , H10B41/10 , H10B41/35
摘要： A semiconductor device includes a gate stack structure including insulating patterns and conductive patterns which are alternately stacked, a first separation structure penetrating the gate stack structure, a second separation structure penetrating the gate stack structure and being adjacent to the first separation structure, first and second memory channel structures penetrating the gate stack structure and disposed between the first separation structure and the second separation structure, a first bit line overlapping with the first and second memory channel structures and electrically connected to the first memory channel structure, and a second bit line overlapping with the first and second memory channel structures and the first bit line and electrically connected to the second memory channel structure.
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公开(公告)号：US20230288948A1
公开(公告)日：2023-09-14
申请号：US18103092
申请日：2023-01-30
发明人： Jaehoon Lee , Yelim Youn , Yong Lim
IPC分类号： G05F1/575
CPC分类号： G05F1/575
摘要： A hybrid low drop-out (LDO) regulator is provided. The hybrid LDO regulator provides current to a load block, and includes: an analog LDO regulator configured to provide a first current corresponding to an average current consumed by the load block; and a digital LDO regulator configured to provide a second current corresponding to a peak current consumed by the load block based on information indicating the peak current is consumed.
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公开(公告)号：US11353922B2
公开(公告)日：2022-06-07
申请号：US17172743
申请日：2021-02-10
发明人： Minsoo Lee , Younghun Seong , Jaehoon Lee , Wanjae Ju
IPC分类号： G06F1/16
摘要： A foldable electronic device is provided. The foldable electronic device includes a hinge structure, a foldable housing, a flexible display disposed inside the foldable housing, a first flexible connection member, a second flexible connection member, an adhesive member attached to the first flexible connection member. The foldable housing includes a first housing structure and a second housing structure. The first housing structure includes a first surface, a second surface, and a first printed circuit board. The second housing structure includes a third surface, a fourth surface, and a second printed circuit board.
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公开(公告)号：US11183997B2
公开(公告)日：2021-11-23
申请号：US16855593
申请日：2020-04-22
发明人： Jaehoon Lee , Yong Lim , Wan Kim , Barosaim Sung , Seunghyun Oh
摘要： A comparator configured to calibrate an offset according to a control signal, including an input circuit configured to receive a first input signal and a second input signal, and to generate a first internal signal corresponding to the first input signal and a second internal signal corresponding to the second input signal; a differential amplification circuit configured to consume a supply current flowing from a positive voltage node having a positive supply voltage to a negative voltage node having a negative supply voltage, and to generate an output signal by amplifying a difference between the first internal signal and the second internal signal; and a current valve configured to adjust at least a portion of the supply current based on the control signal.
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公开(公告)号：US11984907B2
公开(公告)日：2024-05-14
申请号：US17564668
申请日：2021-12-29
发明人： Yong Lim , Jaehoon Lee
摘要： An analog-to-digital converting circuit for converting an analog signal into a digital signal includes a plurality of reference voltage generators each generating a reference voltage, a plurality of reference voltage decoupling capacitors respectively corresponding to the reference voltage generators, and an analog-to-digital converter generating a comparison voltage based on the reference voltage and generating the digital signal corresponding to the analog signal based on a result of comparing the comparison voltage with the analog signal. At least one different combination of the reference voltage generators and the reference voltage decoupling capacitors is connected to the analog-to-digital converter in each of a plurality of conversion periods.
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公开(公告)号：US11804848B2
公开(公告)日：2023-10-31
申请号：US17705776
申请日：2022-03-28
发明人： Jaehoon Lee , Yong Lim , Seunghyun Oh
CPC分类号： H03M1/466 , H03K3/356104 , H03M1/1245 , H03M1/462
摘要： An analog-to-digital converter of successive approximation register (SAR) type includes a comparator, a SAR logic circuit, and a capacitor digital-to-analog converter. The capacitor digital-to-analog converter includes a plurality of drivers. Each driver includes a capacitor and a split inverter. A first capacitor node of the capacitor is connected to one of comparison input terminals. The split inverter includes a pull-up unit connected to a first reference voltage and a pull-down unit connected to a second reference voltage. The split inverter drives a second capacitor node of the capacitor by selectively turning on one of the pull-up unit and the pull-down unit. A first one of the pull-up unit and the pull-down unit includes a full transistor, and a second one of the pull-up unit and the pull-down unit includes a first split transistor and a second split transistor. A short current is reduced using the split inverter.
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公开(公告)号：US20230032366A1
公开(公告)日：2023-02-02
申请号：US17966446
申请日：2022-10-14
发明人： Jaehyeok LEE , Taikuin Mun , Jaehoon Lee
摘要： A method and an apparatus for supporting a wireless connection between an electronic device and an external device are provided. An electronic device includes a microphone; a wireless communication circuit; a display; a memory configured to store instructions; and a processor operatively connected to the microphone, the wireless communication circuit, the display, and the memory, wherein the processor is configured to execute the instructions to: detect a trigger for a wireless connection to an external device; based on the detection of the trigger, search for the external device by using the wireless communication circuit; control the display to display a guide related to proximity between the electronic device and the external device; based on detecting that the electronic device and the external device are within a designated range from each other, acquire an external signal through the microphone by performing a designated operation with the external device; perform authentication for the wireless connection to the external device, based on the acquired external signal; and based on a result of the authentication, configure the wireless connection to the external device via the wireless communication circuit.
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9.发明授权公开(公告)号：US11342907B2
公开(公告)日：2022-05-24
申请号：US16866871
申请日：2020-05-05
发明人： Hyungi Seok , Seungjin Kim , Byungki Han , Jaehoon Lee
IPC分类号： H03K5/1534 , H03K3/017 , H03K5/151 , H03K5/24
摘要： An electronic device includes: a first equalizing circuit configured to receive a data signal and output a first equalizing signal based on the data signal; a pulse generator configured to generate a first pulse signal and a second pulse signal in response to a rising edge and a falling edge of the data signal, respectively; a second equalizing circuit configured to output a second equalizing signal based on the first pulse signal and the second pulse signal that have been inverted; and an output terminal configured to output an output signal in which the first equalizing signal and the second equalizing signal have been summed.
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公开(公告)号：US10819381B2
公开(公告)日：2020-10-27
申请号：US16449765
申请日：2019-06-24
发明人： Sangbong Lee , Namhyung Kim , Taekon Kim , Kiyul Lim , Jaehoon Lee
IPC分类号： G06F3/02 , H04B1/3888 , H04M1/02 , G06F1/16
摘要： An electronic device according to certain embodiments includes a housing, a first glass plate coupled to the housing and defining an inner space, the first glass plate including a peripheral portion including: a first, second, third, fourth, and fifth surface forming an edge of the glass plate, the first and fifth surfaces being substantially parallel and the third surface being substantially perpendicular to the first and fifth surfaces, a decorative layer formed of a first material, disposed on a first area of the fifth surface such that a second area disposed between the fourth surface and the first area is uncovered by the decorative layer, and a protective layer formed of a second material, covering the second surface, the third surface, the fourth surface, the second area of the fifth surface, and a part of the decorative layer.
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