公开(公告)号：US20230395060A1

公开(公告)日：2023-12-07

申请号：US18235124

申请日：2023-08-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangjun PARK ,  Kihyun CHOO ,  Hyoungmin PARK ,  Junesig SUNG

IPC: G10L13/047 ,  G10L13/10

CPC classification number: G10L13/047 ,  G10L13/10

Abstract: An electronic apparatus, a terminal apparatus, and a controlling method thereof. The electronic apparatus includes an input interface; and a processor including a prosody module configured to extract an acoustic feature and a vocoder module configured to generate a speech waveform, wherein the processor is configured to: receive a text input using the input interface; identify a first acoustic feature from the text input using the prosody module, wherein the first acoustic feature corresponds to a first sampling rate; generate a modified acoustic feature corresponding to a modified sampling rate different from the first sampling rate, based on the identified first acoustic feature; and generate a plurality of vocoder learning models by training the vocoder module based on the first acoustic feature and the modified acoustic feature.

公开(公告)号：US20210039149A1

公开(公告)日：2021-02-11

申请号：US16986174

申请日：2020-08-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungtae PARK ,  Myounghun KIM ,  Sangjun PARK ,  Won JU ,  Jungsoo LIM ,  Kookjeong SEO

IPC: B21C23/08 ,  B21C23/00

Abstract: An extrusion apparatus and a method for manufacturing an aluminum capillary tube using the same are provided. The extrusion apparatus includes a container, a housing mold provided on one side of the container and including a plurality of dies formed with a plurality of holes, and a ram pressing an aluminum billet accommodated in the container in a direction from another side to the one side of the container so that the aluminum billet accommodated in the container is extruded into a plurality of aluminum capillary tubes having cross-sectional shapes corresponding to the plurality of holes, and the number of the plurality of holes is determined based on an inner diameter of the container and a diameter of each of the plurality of holes.

公开(公告)号：US20230119872A1

公开(公告)日：2023-04-20

申请号：US18066177

申请日：2022-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jiho JEONG ,  Sangjun PARK

IPC: F24C15/02 ,  H05K7/14

Abstract: A cooking appliance according to a concept of the disclosure includes: a cooking room; and a door configured to open or close the cooking room, wherein the door includes: a door body forming an accommodating space in which a printed circuit board is accommodated; a front panel positioned in front of the door body to cover the accommodating space; and a panel bracket fixed to the front panel and configured to detachably couple the front panel with the door body, and the accommodating space is exposed to an outside of the cooking appliance upon separating of the front panel from the door body.

公开(公告)号：US20220270588A1

公开(公告)日：2022-08-25

申请号：US17534969

申请日：2021-11-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangjun PARK ,  Kihyun CHOO

IPC: G10L13/08 ,  G06N3/04 ,  G10L19/032

Abstract: The electronic device may include a communication interface; a memory configured to store a first neural network model; and a processor configured to: receive, from an external electronic device via the communication interface, compressed information related to an acoustic feature obtained based on a text; decompress the compressed information to obtain decompressed information; and obtain sound information corresponding to the text by inputting the decompressed information into the first neural network model. The first neural network model may be obtained by training a relationship between a plurality of sample acoustic features and a plurality of sample sounds corresponding to the plurality of sample acoustic features.

公开(公告)号：US20210292874A1

公开(公告)日：2021-09-23

申请号：US17265962

申请日：2019-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungtae PARK ,  Sangjun PARK ,  Won JU ,  Jungsoo LIM

IPC: C22C21/02 ,  C22C1/03 ,  B22D21/00 ,  D06F37/20

Abstract: Provided is an aluminum alloy for die casting. The aluminum alloy includes: 3-10 wt % silicon (Si); 0.1-2.0 wt % magnesium (Mg); 0.01-1.3 wt % iron (Fe); 0.01-2.0 wt % zinc (Zn); 0.01-1.5 wt % copper (Cu); 0.01-0.5 wt % manganese (Mn); 0.01-0.5 wt % chrome (Cr); 0.01˜2.0 wt % lanthanum (La); 0.0˜12.0 wt % cerium (Ce); 0.0˜12.0 wt % strontium (Sr); rest aluminum (Al); and unavoidable impurities. The aluminum alloy is improved in not only corrosion-resistance but also physical properties.

公开(公告)号：US20180129773A1

公开(公告)日：2018-05-10

申请号：US15610751

申请日：2017-06-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangjun PARK ,  Byung-Sung KIM ,  CHULHONG PARK ,  Chunyub PARK

IPC: G06F17/50 ,  H01L21/8234 ,  H01L27/02

CPC classification number: G06F17/5081 ,  G06F2217/12 ,  H01L21/823437 ,  H01L27/0207

Abstract: A design method of a semiconductor integrated circuit layout and a method of fabricating a semiconductor device, the design method including selecting a first cell layout including at least one first gate pattern; selecting a second cell layout including at least one second gate pattern, the at least one second gate pattern having a gate length that is different from a gate length of the at least one first gate pattern; producing a pattern layout from the first and second cell layouts; and producing a mask layout selectively overlapping the first cell layout on the pattern layout.

公开(公告)号：US20240373621A1

公开(公告)日：2024-11-07

申请号：US18627685

申请日：2024-04-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungmin SHIN ,  Kijong PARK ,  Sangjun PARK ,  Younggeun SONG ,  Ilyoung YOON ,  Yongjin LEE

IPC: H10B12/00

Abstract: In a method for manufacturing a semiconductor device, comprising; forming mold insulation patterns on a substrate, forming an oxide semiconductor layer conformally on sidewalls and upper surfaces of the mold insulation patterns and the substrate, forming a first metal oxide layer on the oxide semiconductor layer, patterning the first sacrificial layer, the first metal oxide layer, and the oxide semiconductor layer to form a first structure including a preliminary first metal oxide layer pattern, a preliminary oxide semiconductor layer pattern and a first sacrificial layer pattern stacked, forming a preliminary second metal oxide layer pattern selectively on a sidewall of the preliminary oxide semiconductor layer pattern, removing selective portions of the first structure and the preliminary second metal oxide layer pattern to form an oxide semiconductor layer pattern, a first metal oxide layer pattern, and a second metal oxide layer pattern.

公开(公告)号：US20240282753A1

公开(公告)日：2024-08-22

申请号：US18634014

申请日：2024-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunji KIM ,  Seungwoo PAEK ,  Byungkyu KIM ,  Sangjun PARK ,  Sungdong CHO

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L23/538 ,  H01L29/423 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40

CPC classification number: H01L25/0657 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/08 ,  H01L29/42344 ,  H10B43/40 ,  H01L2224/08146 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/1431 ,  H01L2924/1438 ,  H10B43/27 ,  H10B43/35

Abstract: A device including a first structure and a second structure is provided. The device includes a substrate, a peripheral circuit and first junction pads on the substrate; a first insulating structure surrounding side surfaces of the first junction pads; second junction pads contacting the first junction pads; a second insulating structure on the first insulating structure; a passivation layer on the second insulating structure; an upper insulating structure between the passivation layer and the second insulating structure; a barrier capping layer between the upper insulating structure and the passivation layer; conductive patterns spaced apart from each other in the upper insulating structure; a first pattern structure between the upper insulating structure and the second insulating structure; a stack structure between the second insulating structure and the first pattern structure, and including gate layers; and a vertical structure passing through the stack structure and including a data storage structure and a channel layer.

公开(公告)号：US20220285208A1

公开(公告)日：2022-09-08

申请号：US17453504

申请日：2021-11-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangjun PARK ,  Byungkyu KIM ,  Eunji KIM ,  Seungwoo PAEK ,  Sungdong CHO

IPC: H01L21/768 ,  H01L23/522 ,  H01L25/065 ,  H01L25/18

Abstract: A semiconductor chip structure includes a first semiconductor chip that includes a first chip region and a first scribe lane region and a second semiconductor chip that includes a second chip region and a second scribe lane region respectively bonded to the first chip region and the first scribe lane region. The first semiconductor chip includes a first bonding wiring layer that includes a first bonding insulating layer and a first bonding electrode in the first bonding insulating layer. The second semiconductor chip includes a second bonding wiring layer that includes a second bonding insulating layer and a second bonding electrode in the second bonding insulating layer and a polishing stop pattern. The first bonding insulating layer and the first bonding electrode of the first bonding wiring layer are respectively hybrid bonded to the second bonding insulating layer and the second bonding electrode of the second bonding wiring layer.

公开(公告)号：US20220262377A1

公开(公告)日：2022-08-18

申请号：US17712417

申请日：2022-04-04

Applicant: SAMSUNG ELECTRONICS CO, LTD.

Inventor： Sangjun PARK ,  Kihyun CHOO ,  Taehwa KANG ,  Hosang SUNG ,  Jonghoon JEONG

IPC: G10L19/08 ,  G10L25/60 ,  G10L19/16 ,  G06N20/00

Abstract: The disclosure relates to an electronic device and a control method thereof. The electronic device includes a memory, and a processor configured to: obtain first feature data for estimating a waveform by inputting acoustic data of a first quality to a first encoder model; and obtain waveform data of a second quality that is a higher quality than the first quality by inputting the first feature data to a decoder model to.