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公开(公告)号:US20240038634A1
公开(公告)日:2024-02-01
申请号:US18336477
申请日:2023-06-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JINKYU KIM , YUNSUK NAM , GUKHEE KIM , JUNBEOM PARK , JAEHYUN AHN , DARONG OH , DONGICK LEE
IPC: H01L23/48 , H10B10/00 , H01L29/423 , H01L29/06 , H01L29/786 , H01L29/775 , H10B10/10
CPC classification number: H01L23/481 , H10B10/125 , H01L29/42392 , H01L29/0673 , H01L29/78696 , H01L29/775 , H10B10/10
Abstract: A semiconductor device, includes: a substrate having a first region and a second region; a first device on the substrate, in the first region; a second device on the substrate, in the second region; a front side interconnection structure including a plurality of interconnection layers electrically connected to the first device and the second device, on a front side of the substrate; and a back side buried interconnection structure adjacently to a back side of the substrate opposing the front side. The back side buried interconnection structure includes a back side buried insulating layer in a trench recessed from a back side of the substrate toward the front side of the substrate, and a back side buried conductive layer in the back side buried insulating layer. The back side buried interconnection structure is located in the first region or the second region.
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公开(公告)号:US20250089297A1
公开(公告)日:2025-03-13
申请号:US18621413
申请日:2024-03-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JEEWOONG KIM , SUNGMOON LEE , YUNSUK NAM , KEUN HWI CHO
IPC: H01L29/417 , H01L21/285 , H01L23/528 , H01L29/06 , H01L29/08 , H01L29/40 , H01L29/423 , H01L29/45 , H01L29/66 , H01L29/775
Abstract: A semiconductor device according to embodiment includes: a base insulation layer having a first surface and a second surface facing each other with a thickness therebetween; a channel layer on the first surface of the base insulation layer; a first source/drain pattern and a second source/drain pattern on the first surface of the base insulation layer and arranged in a first direction with the channel layer therebetween; a gate structure, that extends in a second direction crossing the first direction on the first surface of the base insulation layer, and surrounds the channel layer; a first silicide layer on a side wall of a recess pattern that penetrates the first source/drain pattern in a third direction that is perpendicular to the first direction and the second direction; and an interlayer insulation layer that is disposed in the recess pattern.
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