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1.
公开(公告)号:US10332607B2
公开(公告)日:2019-06-25
申请号:US15830679
申请日:2017-12-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Na-Young Choi , Il-Han Park , Seung-Hwan Song
IPC: G11C16/34 , G11C16/28 , G11C16/08 , G06F11/10 , G11C16/24 , G11C29/02 , G11C29/42 , G11C11/56 , G11C29/52 , G11C16/04
Abstract: In a method of operating a nonvolatile memory device including a memory cell array, where the memory cell array includes a plurality of pages, and each of the plurality of pages includes a plurality of nonvolatile memory cells, a first sampling read operation is performed to count a first number of memory cells in a first region of a first page selected from the plurality of pages, using a first default read voltage and a first offset read voltage, and a second sampling read operation is selectively performed to count a second number of memory cells in a second region of the first page, using the first default read voltage and a second offset read voltage, based on a comparison result of the first number and a first reference value. The second offset read voltage is different from the first offset read voltage.
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2.
公开(公告)号:US20180261296A1
公开(公告)日:2018-09-13
申请号:US15830679
申请日:2017-12-04
Applicant: SAMSUNG ELECTRONICS CO. LTD.
Inventor: NA-YOUNG CHOI , Il-Han Park , Seung-Hwan Song
CPC classification number: G11C16/3431 , G06F11/1068 , G11C11/5642 , G11C16/0483 , G11C16/08 , G11C16/24 , G11C16/28 , G11C16/3427 , G11C29/021 , G11C29/028 , G11C29/42 , G11C29/52 , G11C2211/5642
Abstract: In a method of operating a nonvolatile memory device including a memory cell array, where the memory cell array includes a plurality of pages, and each of the plurality of pages includes a plurality of nonvolatile memory cells, a first sampling read operation is performed to count a first number of memory cells in a first region of a first page selected from the plurality of pages, using a first default read voltage and a first offset read voltage, and a second sampling read operation is selectively performed to count a second number of memory cells in a second region of the first page, using the first default read voltage and a second offset read voltage, based on a comparison result of the first number and a first reference value. The second offset read voltage is different from the first offset read voltage.
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