公开(公告)号：US20210351059A1

公开(公告)日：2021-11-11

申请号：US16867845

申请日：2020-05-06

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Shoichi MURAKAMI ,  Shigeru NAKATSUKA ,  Syo FUKATA ,  Yusuke OSAWA ,  Shigehiro FUJINO ,  Masaaki HIGASHITANI

IPC: H01L21/683 ,  H01J37/32 ,  H01L21/67 ,  H01L21/66 ,  C23C16/509

Abstract: An apparatus includes an electrostatic chuck and located within a vacuum enclosure. A plurality of conductive plates can be embedded in the electrostatic chuck, and a plurality of plate bias circuits can be configured to independently electrically bias a respective one of the plurality of conductive plates. Alternatively or additionally, a plurality of spot lamp zones including a respective set of spot lamps can be provided between a bottom portion of the vacuum enclosure and a backside surface of the electrostatic chuck. The plurality of conductive plates and/or the plurality of spot lamp zones can be employed to locally modify chucking force and to provide local temperature control.

公开(公告)号：US20210351058A1

公开(公告)日：2021-11-11

申请号：US16867818

申请日：2020-05-06

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Shoichi MURAKAMI ,  Shigeru NAKATSUKA ,  Syo FUKATA ,  Yusuke OSAWA ,  Shigehiro FUJINO ,  Masaaki HIGASHITANI

IPC: H01L21/683 ,  H01L21/67 ,  H01L21/687 ,  H01J37/32

Abstract: An apparatus includes an electrostatic chuck and located within a vacuum enclosure. A plurality of conductive plates can be embedded in the electrostatic chuck, and a plurality of plate bias circuits can be configured to independently electrically bias a respective one of the plurality of conductive plates. Alternatively or additionally, a plurality of spot lamp zones including a respective set of spot lamps can be provided between a bottom portion of the vacuum enclosure and a backside surface of the electrostatic chuck. The plurality of conductive plates and/or the plurality of spot lamp zones can be employed to locally modify chucking force and to provide local temperature control.

公开(公告)号：US20210348272A1

公开(公告)日：2021-11-11

申请号：US16868787

申请日：2020-05-07

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Shoichi MURAKAMI ,  Shigeru NAKATSUKA ,  Syo FUKATA ,  Yusuke OSAWA ,  Shigehiro FUJINO ,  Masaaki HIGASHITANI

IPC: C23C16/458 ,  H01L21/02 ,  H01L21/683 ,  H01L21/687 ,  H01J37/32 ,  H01L21/033 ,  C23C16/50 ,  C23C16/455

Abstract: A deposition chamber includes a vacuum enclosure, an electrostatic chuck having a flat top surface located within a vacuum enclosure, a lift-and-rotation unit extending through or laterally surrounding the electrostatic chuck at a position that is laterally offset from a vertical axis passing through a geometrical center of the electrostatic chuck, a gas supply manifold configured to provide influx of gas into the vacuum enclosure, and a pumping port connected to the vacuum enclosure.

公开(公告)号：US20220399232A1

公开(公告)日：2022-12-15

申请号：US17345315

申请日：2021-06-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Fumitaka AMANO ,  Yusuke OSAWA ,  Kensuke ISHIKAWA ,  Mitsuteru MUSHIGA ,  Motoki KAWASAKI ,  Shinsuke YADA ,  Masato MIYAMOTO ,  Syo FUKATA ,  Takashi KASHIMURA ,  Shigehiro FUJINO

IPC: H01L21/768 ,  H01L23/535 ,  H01L27/11556 ,  H01L27/11582 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00

Abstract: A vertical layer stack including a bit-line-level dielectric layer and an etch stop dielectric layer can be formed over an array region. Bit-line trenches are formed through the vertical layer stack. Bit-line-trench fill structures are formed in the bit-line trenches. Each of the bit-line-trench fill structures includes a stack of a bit line and a capping dielectric strip. At least one via-level dielectric layer can be formed over the vertical layer stack. A bit-line-contact via cavity can be formed through the at least one via-level dielectric layer and one of the capping dielectric strips. A bit-line-contact via structure formed in the bit-line-contact via cavity includes a stepped bottom surface including a top surface of one of the bit lines, a sidewall segment of the etch stop dielectric layer, and a segment of a top surface of the etch stop dielectric layer.

公开(公告)号：US20210391154A1

公开(公告)日：2021-12-16

申请号：US16900126

申请日：2020-06-12

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Syo FUKATA ,  Shoichi MURAKAMI ,  Shigeru NAKATSUKA ,  Yusuke OSAWA ,  Shigehiro FUJINO ,  Masaaki HIGASHITANI

IPC: H01J37/32 ,  H01L21/687

Abstract: An anisotropic etch apparatus contains an electrostatic chuck located in a vacuum enclosure and including a lower electrode, an upper electrode overlying the lower electrode and located in the vacuum enclosure, a main radio frequency (RF) power source configured to provide an RF bias voltage between the lower electrode and the upper electrode, and a plurality of conductive edge ring segments surrounding the electrostatic chuck and configured for at least one of independent vertical movement relative to the electrostatic chuck or for independently receiving a different RF bias voltage.