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公开(公告)号：US20220246605A1
公开(公告)日：2022-08-04
申请号：US17590840
申请日：2022-02-02
发明人： Atsushi TANAKA , Teppei HIGUCHI
摘要： A variable capacitance circuit includes a capacitor array having a first capacitor in which a plurality of MIM capacitors are coupled in parallel and a second capacitor in which a plurality of MIM capacitors are coupled in series, and a switch array having a first switch and a second switch. A shape pattern of at least one of a first electrode of the first capacitor, a first ground shield, a second electrode of the second capacitor, and a second ground shield is set so that a first capacitance difference per 1 LSB between first capacitance values of the first capacitor when the first switch is turned on and off and a second capacitance difference per 1 LSB between second capacitance values of the second capacitor when the second switch is turned on and off are close to each other.
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2.发明申请公开(公告)号：US20180287626A1
公开(公告)日：2018-10-04
申请号：US15926199
申请日：2018-03-20
发明人： Hideo HANEDA , Atsushi TANAKA
CPC分类号： H03M1/468 , H03M1/0641 , H03M1/1019
摘要： A circuit device includes a code data generation circuit that generates code data which changes with time, and a successive approximation type A/D conversion circuit that performs code shift based on the code data and performs A/D conversion of an input signal. The code data generation circuit generates error data of which a frequency characteristic has a shaping characteristic and converts the error data into the code data.
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公开(公告)号：US20170365414A1
公开(公告)日：2017-12-21
申请号：US15617292
申请日：2017-06-08
发明人： Atsushi TANAKA , Hideo HANEDA
CPC分类号： H01G4/40 , G01D5/56 , G01D21/00 , H03M1/001 , H03M1/1061 , H03M1/1245 , H03M1/38 , H03M1/468 , H03M1/68 , H03M1/804
摘要： A capacitor circuit includes: a capacitor array including a plurality of capacitors; a switch array including a plurality of switch circuits, the switch circuits being respectively connected to the capacitors of the capacitor array; a plurality of switch control signal lines supplied with a plurality of switch control signals; and a substrate having a major surface on which the switch circuits are formed. At least part of the capacitors of the capacitor array is formed of a first conductive layer. The switch control signal lines are formed of a second conductive layer provided between the major surface and the first conductive layer. The capacitor array and the switch array are disposed so as to overlap each other at least in part in a plan view when viewed in a normal direction of the major surface.
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公开(公告)号：US20190207622A1
公开(公告)日：2019-07-04
申请号：US16227494
申请日：2018-12-20
发明人： Atsushi TANAKA
摘要： A circuit device includes a selector to which first to n-th voltages are input, an A/D converter circuit to which output voltages of the selector are input as input voltages, and first to n-th quantization error hold circuits that hold charges corresponding to quantization errors in A/D conversion of the first to n-th voltages. The A/D converter circuit performs A/D conversion of an input voltage by a successive approximation operation using a charge redistribution type D/A converter circuit and performs k-th A/D conversion on an i-th voltage by using a charge held in an i-th quantization error hold circuit in (k−1)th A/D conversion of the i-th voltage to output A/D conversion result data DOUT in which the quantization error is noise-shaped.
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5.发明申请公开(公告)号：US20180130606A1
公开(公告)日：2018-05-10
申请号：US15862992
申请日：2018-01-05
发明人： Atsushi TANAKA , Hideo HANEDA
CPC分类号： H01G4/40 , G01D5/56 , G01D21/00 , H03M1/001 , H03M1/1061 , H03M1/1245 , H03M1/38 , H03M1/468 , H03M1/68 , H03M1/804
摘要： A capacitor circuit includes: a capacitor array including a plurality of capacitors; a switch array including a plurality of switch circuits, the switch circuits being respectively connected to the capacitors of the capacitor array; a plurality of switch control signal lines supplied with a plurality of switch control signals; and a substrate having a major surface on which the switch circuits are formed. At least part of the capacitors of the capacitor array is formed of a first conductive layer. The switch control signal lines are formed of a second conductive layer provided between the major surface and the first conductive layer. The capacitor array and the switch array are disposed so as to overlap each other at least in part in a plan view when viewed in a normal direction of the major surface.
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公开(公告)号：US20240250662A1
公开(公告)日：2024-07-25
申请号：US18420833
申请日：2024-01-24
发明人： Atsushi TANAKA
CPC分类号： H03H9/19 , H03B5/04 , H03H9/0557 , H03H9/1021
摘要： A vibrator device includes: a vibrator; and a circuit device disposed apart from the vibrator, in which the circuit device includes a drive circuit configured to drive the vibrator, a temperature sensor configured to generate a temperature signal corresponding to a detected temperature, a temperature compensation circuit configured to compensate for temperature characteristics of a drive state of the vibrator based on the temperature signal, a heat source circuit configured to operate in a first state or in a second state in which current consumption is different from current consumption in the first state, and a transient response compensation circuit configured to compensate for, when the first state and the second state of the heat source circuit are switched, a difference between a transient response of a temperature detected by the temperature sensor and a transient response of a temperature of the vibrator.
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公开(公告)号：US20190207621A1
公开(公告)日：2019-07-04
申请号：US16225805
申请日：2018-12-19
发明人： Atsushi TANAKA , Fumikazu KOMATSU
摘要： A circuit device includes an A/D converter circuit that performs A/D conversion by successive approximation using a charge redistribution type D/A converter circuit having capacitor array circuits on the positive electrode side and the negative electrode side, and quantization error hold circuits that hold charges corresponding to a quantization error in the A/D conversion. The quantization error hold circuits include quantization error hold circuits on the positive electrode side and the negative electrode side having one ends connected to sampling nodes of the capacitor array circuits on the positive electrode side and the negative electrode side. The quantization error hold circuits on the positive electrode side and the negative electrode side are placed on a second direction side orthogonal to a first direction in which the capacitor array circuits on the positive electrode side and the negative electrode side are placed.
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公开(公告)号：US20220247352A1
公开(公告)日：2022-08-04
申请号：US17587127
申请日：2022-01-28
发明人： Yuichi TORIUMI , Hideo HANEDA , Teppei HIGUCHI , Atsushi TANAKA
摘要： A circuit device includes an oscillation circuit and a processing circuit that generates capacitance control data. The oscillation circuit includes a variable capacitance circuit whose capacitance value is variably controlled based on the capacitance control data, and an oscillation frequency thereof is controlled based on the capacitance value of the variable capacitance circuit. The variable capacitance circuit includes a capacitor array. The capacitor array includes a plurality of capacitors each having a binary-weighted capacitance value, and a plurality of switches that are on-off controlled based on the capacitance control data. The processing circuit outputs the capacitance control data, which is subjected to dithering, so as to switch the capacitance value of the variable capacitance circuit between a first capacitance value and a second capacitance value in a time division manner.
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公开(公告)号：US20210226645A1
公开(公告)日：2021-07-22
申请号：US17150105
申请日：2021-01-15
发明人： Hideyuki YAMADA , Atsushi TANAKA
IPC分类号： H03M1/12 , H03M1/06 , G01C19/5776
摘要： A physical quantity detection circuit includes an analog/digital conversion circuit having an input capacitance and sampling an analog signal in the input capacitance to convert the analog signal into a digital signal, a precharge circuit for precharging the input capacitance before the analog/digital conversion circuit sample the analog signal in the input capacitance, a digital arithmetic circuit for performing arithmetic processing to the digital signal, and a reference voltage circuit for supplying a power supply voltage to the precharge circuit and the digital arithmetic circuit, wherein the arithmetic processing start timing and the arithmetic processing end timing of the digital arithmetic circuit are set to the timings avoiding the precharge period in which the precharge circuit precharges the input capacitance.
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公开(公告)号：US20210285769A1
公开(公告)日：2021-09-16
申请号：US17198305
申请日：2021-03-11
发明人： Atsushi TANAKA , Katsuhito NAKAJIMA
IPC分类号： G01C19/5776
摘要： A physical quantity detection circuit includes: an analog/digital conversion circuit performing analog/digital conversion processing on an analog signal based on an output signal from a physical quantity detection element and outputting a first digital signal; a digital arithmetic circuit having the first digital signal inputted thereto, performing arithmetic processing on the first digital signal, and outputting a second digital signal; and a regulator circuit supplying a power-supply voltage to the analog/digital conversion circuit and the digital arithmetic circuit. The digital arithmetic circuit does not perform an arithmetic processing start operation to start the arithmetic processing and an arithmetic processing end operation to end the arithmetic processing, during an analog/digital conversion period when the analog/digital conversion is performed.
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