公开(公告)号：US20220254734A1

公开(公告)日：2022-08-11

申请号：US17660941

申请日：2022-04-27

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Chee Hiong CHEW ,  Erik Nino TOLENTINO ,  Yusheng LIN ,  Swee Har KHOR

IPC: H01L23/00 ,  H01L23/495 ,  H01L21/78 ,  H01L21/48

Abstract: Implementations of methods of forming a plurality of reinforced die may include forming a plurality of die on a substrate and patterning a metal gang frame to form a plurality of metal plates. The plurality of metal plates may correspond to the plurality of die. The method may include coupling the metal gang frame over the plurality of die and singulating the plurality of die. Each die of the plurality of die may include the corresponding metal plate from the plurality of metal plates coupled over the plurality of die.

公开(公告)号：US20200161209A1

公开(公告)日：2020-05-21

申请号：US16773436

申请日：2020-01-27

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Erik Nino TOLENTINO ,  Vemal Raja MANIKAM ,  Azhar ARIPIN

IPC: H01L23/373 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

Abstract: A power semiconductor package includes a first direct bonded copper (DBC) substrate having a plurality of connection traces on a first face of the first DBC substrate. A plurality of die are coupled to the connection traces, each die coupled to one of the connection traces at a first face of the die. A second DBC substrate includes connection traces on a first face of the second DBC substrate. A second face of each die is coupled to one of the connection traces of the first face of the second DBC substrate. A cavity between the first face of the first DBC substrate and the first face of the second DBC substrate is filled with an encapsulating compound. Terminal pins may be coupled to connection traces on the first face of the first DBC substrate. More than two DBC substrates may be stacked to form a stacked power semiconductor package.

公开(公告)号：US20240072009A1

公开(公告)日：2024-02-29

申请号：US18490270

申请日：2023-10-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Chee Hiong CHEW ,  Erik Nino TOLENTINO ,  Vemmond Jeng Hung NG ,  Shutesh KRISHNAN

IPC: H01L25/07 ,  H01L23/00 ,  H01L23/373 ,  H01L25/00 ,  H01L25/18

CPC classification number: H01L25/072 ,  H01L23/3735 ,  H01L24/40 ,  H01L24/84 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/4001 ,  H01L2224/40137 ,  H01L2224/4052 ,  H01L2224/40991 ,  H01L2224/8484 ,  H01L2224/84931 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0503 ,  H01L2924/1203 ,  H01L2924/13055

Abstract: Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.

公开(公告)号：US20200294935A1

公开(公告)日：2020-09-17

申请号：US16886395

申请日：2020-05-28

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Erik Nino TOLENTINO ,  Chee Hiong CHEW ,  Yusheng LIN ,  Swee Har KHOR

IPC: H01L23/00 ,  H01L23/495 ,  H01L21/78 ,  H01L21/48

Abstract: Implementations of methods of forming a plurality of reinforced die may include forming a plurality of die on a substrate and patterning a metal gang frame to form a plurality of metal plates. The plurality of metal plates may correspond to the plurality of die. The method may include coupling the metal gang frame over the plurality of die and singulating the plurality of die. Each die of the plurality of die may include the corresponding metal plate from the plurality of metal plates coupled over the plurality of die.

公开(公告)号：US20200286865A1

公开(公告)日：2020-09-10

申请号：US16745762

申请日：2020-01-17

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Chee Hiong CHEW ,  Erik Nino TOLENTINO ,  Vemmond Jeng Hung NG ,  Shutesh KRISHNAN

IPC: H01L25/07 ,  H01L25/18 ,  H01L23/00 ,  H01L23/373 ,  H01L25/00

Abstract: Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.

公开(公告)号：US20180261525A1

公开(公告)日：2018-09-13

申请号：US15973873

申请日：2018-05-08

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Erik Nino TOLENTINO ,  Vemal Raja MANIKAM ,  Azhar ARIPIN

IPC: H01L23/373 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00

Abstract: A power semiconductor package includes a first direct bonded copper (DBC) substrate having a plurality of connection traces on a first face of the first DBC substrate. A plurality of die are coupled to the connection traces, each die coupled to one of the connection traces at a first face of the die. A second DBC substrate includes connection traces on a first face of the second DBC substrate. A second face of each die is coupled to one of the connection traces of the first face of the second DBC substrate. A cavity between the first face of the first DBC substrate and the first face of the second DBC substrate is filled with an encapsulating compound. Terminal pins may be coupled to connection traces on the first face of the first DBC substrate. More than two DBC substrates may be stacked to form a stacked power semiconductor package.

公开(公告)号：US20200144200A1

公开(公告)日：2020-05-07

申请号：US16181876

申请日：2018-11-06

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Erik Nino TOLENTINO ,  Chee Hiong CHEW ,  Yusheng LIN ,  Swee Har KHOR

IPC: H01L23/00 ,  H01L23/495 ,  H01L21/48 ,  H01L21/78

Abstract: Implementations of methods of forming a plurality of reinforced die may include forming a plurality of die on a substrate and patterning a metal gang frame to form a plurality of metal plates. The plurality of metal plates may correspond to the plurality of die. The method may include coupling the metal gang frame over the plurality of die and singulating the plurality of die. Each die of the plurality of die may include the corresponding metal plate from the plurality of metal plates coupled over the plurality of die.

公开(公告)号：US20170221792A1

公开(公告)日：2017-08-03

申请号：US15489998

申请日：2017-04-18

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Erik Nino TOLENTINO ,  Vemal Raja MANIKAM ,  Azhair ARIPIN

IPC: H01L23/373 ,  H01L25/00 ,  H01L25/065 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/3735 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/315 ,  H01L23/49861 ,  H01L23/5385 ,  H01L23/5389 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/33

Abstract: A power semiconductor package includes a first direct bonded copper (DBC) substrate having a plurality of connection traces on a first face of the first DBC substrate. A plurality of die are coupled to the connection traces, each die coupled to one of the connection traces at a first face of the die. A second DBC substrate includes connection traces on a first face of the second DBC substrate. A second face of each die is coupled to one of the connection traces of the first face of the second DBC substrate. A cavity between the first face of the first DBC substrate and the first face of the second DBC substrate is filled with an encapsulating compound. Terminal pins may be coupled to connection traces on the first face of the first DBC substrate. More than two DBC substrates may be stacked to form a stacked power semiconductor package.