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公开(公告)号:US20220199602A1
公开(公告)日:2022-06-23
申请号:US17247797
申请日:2020-12-23
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Jonghwan BAEK , JeongHyuk PARK , Seungwon IM , Keunhyuk LEE
IPC: H01L25/18 , H01L23/495 , H01L23/367 , H01L23/31 , H01L23/00 , H01L25/00
Abstract: Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.
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公开(公告)号:US20230245953A1
公开(公告)日:2023-08-03
申请号:US18295942
申请日:2023-04-05
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Jonghwan BAEK , JeongHyuk PARK , Seungwon IM , Keunhyuk LEE
IPC: H01L23/495 , H01L23/00
CPC classification number: H01L23/4951 , H01L23/49575 , H01L24/48 , H01L24/32 , H01L2924/1531 , H01L2224/48247 , H01L2224/32014 , H01L2924/14 , H01L2924/181 , H01L2224/48091
Abstract: Implementations of semiconductor packages may include a substrate, a first die coupled on the substrate, and a lead frame coupled over the substrate. The lead frame may include a die attach pad. Implementations of semiconductor packages may also include a second die coupled on the die attach pad. The second die may overlap the first die.
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公开(公告)号:US20240088007A1
公开(公告)日:2024-03-14
申请号:US17931665
申请日:2022-09-13
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Jonghwan BAEK , Jeonghyuk PARK , Seungwon IM , Keunhyuk LEE , Dukyong LEE
IPC: H01L23/498 , H01L21/48 , H01L23/00 , H01L25/00 , H01L25/16
CPC classification number: H01L23/49833 , H01L21/4825 , H01L21/4839 , H01L23/49811 , H01L23/49822 , H01L23/49844 , H01L23/49861 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/162 , H01L25/50 , H01L2224/32225 , H01L2224/48139 , H01L2224/48145 , H01L2224/48175 , H01L2224/48225 , H01L2224/73265 , H01L2924/12036 , H01L2924/13055
Abstract: A package includes a first direct bonded metal (DBM) substrate, a first semiconductor die disposed on a top surface of the first DBM substrate, a second DBM substrate disposed at a height above the first DBM substrate, and a second semiconductor die disposed on a top surface of the second DBM substrate. A wire bond is made between the first semiconductor die disposed on the top surface of the first DBM substrate and the second semiconductor die disposed on the top surface of the second DBM substrate.
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公开(公告)号:US20220208654A1
公开(公告)日:2022-06-30
申请号:US17136340
申请日:2020-12-29
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Jonghwan BAEK , JeongHyuk PARK , Seungwon IM , Keunhyuk LEE
IPC: H01L23/495 , H01L23/00
Abstract: Implementations of semiconductor packages may include a substrate, a first die coupled on the substrate, and a lead frame coupled over the substrate. The lead frame may include a die attach pad. Implementations of semiconductor packages may also include a second die coupled on the die attach pad. The second die may overlap the first die.
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公开(公告)号:US20250132231A1
公开(公告)日:2025-04-24
申请号:US18489961
申请日:2023-10-19
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Jie CHANG , Jonghwan BAEK , Keunhyuk LEE
IPC: H01L23/495 , H01L23/373
Abstract: In a general aspect, a semiconductor device assembly includes a substrate, a semiconductor die coupled to the substrate, and a conductive clip coupled to the semiconductor die. The conductive clip is arranged along a longitudinal axis and a transverse axis. The conductive clip has a length along the longitudinal axis, a width along the transverse axis, and a slot defined therethrough. The slot has a length along the longitudinal axis that is greater than or equal to seventy percent of the length of the conductive clip along the longitudinal axis. The slot has a width along the transverse axis that is greater than or equal to thirty percent of the width of the conductive clip along the transverse axis.
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公开(公告)号:US20250125227A1
公开(公告)日:2025-04-17
申请号:US18990219
申请日:2024-12-20
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Jonghwan BAEK , JeongHyuk PARK , Seungwon IM , Keunhyuk LEE
IPC: H01L23/495 , H01L23/00
Abstract: Implementations of semiconductor packages may include a substrate, a first die coupled on the substrate, and a lead frame coupled over the substrate. The lead frame may include a die attach pad. Implementations of semiconductor packages may also include a second die coupled on the die attach pad. The second die may overlap the first die.
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公开(公告)号:US20230253393A1
公开(公告)日:2023-08-10
申请号:US18301939
申请日:2023-04-17
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Jonghwan BAEK , JeongHyuk PARK , Seungwon IM , Keunhyuk LEE
IPC: H01L25/18 , H01L23/495 , H01L23/367 , H01L23/31 , H01L23/00 , H01L25/00
CPC classification number: H01L25/18 , H01L23/49524 , H01L23/3677 , H01L23/3107 , H01L24/32 , H01L24/33 , H01L25/50 , H01L23/49575 , H01L2224/33181 , H01L2224/32245
Abstract: Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.
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