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公开(公告)号:US20230004699A1
公开(公告)日:2023-01-05
申请号:US17930081
申请日:2022-09-07
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: James Joseph VICTORY , Klaus NEUMAIER , YunPeng XIAO , Jonathan HARPER , Vaclav VALENTA , Stanley BENCZKOWSKI , Thierry BORDIGNON , Wai Lun CHU
IPC: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08
Abstract: Implementations of a method of designing a module semiconductor product may include receiving a selection of a module type, one or more die, a placement of one or more wires, clips, or pins; and generating, using a processor, a module configuration file. The method may include generating a module bonding diagram using a build diagram system module; selecting one or more SPICE models corresponding with the die; and generating a product SPICE model and a three dimensional model for the module semiconductor product. The method may include generating one or more datasheet characteristics of the module semiconductor product with at least the product SPICE model and the product simulation module, generating a product datasheet for the module semiconductor product using the datasheet formation module, and providing access to at least the module bonding diagram, the product SPICE model, the three dimensional model, and the product datasheet to the user.
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公开(公告)号:US20240427972A1
公开(公告)日:2024-12-26
申请号:US18648952
申请日:2024-04-29
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Klaus NEUMAIER , James Joseph VICTORY , Vaclav VALENTA , Sameer YADAV , Wai Lun CHU
IPC: G06F30/31 , G06F111/20
Abstract: Implementations of an object file for modeling using a three dimensional modeling module may include a first object defined as a root object, the first object corresponding with a first component of a semiconductor package; a second object corresponding with a second component of the semiconductor package directly physically coupled to the first component of the semiconductor package, the second object including a reference to the root object; and at least a third object corresponding with a third component of the semiconductor package, the third object including a reference to the root object, the third component of the semiconductor package directly coupled with a fourth component of the semiconductor package indirectly physically coupled to the second component of the semiconductor package.
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公开(公告)号:US20210117599A1
公开(公告)日:2021-04-22
申请号:US17076072
申请日:2020-10-21
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: James Joseph VICTORY , Klaus NEUMAIER , YunPeng XIAO , Jonathan HARPER , Vaclav VALENTA , Stanley BENCZKOWSKI , Thierry BORDIGNON , Wai Lun CHU
IPC: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398
Abstract: Implementations of a method of designing a module semiconductor product may include receiving a selection of a module type, one or more die, a placement of one or more wires, clips, or pins; and generating, using a processor, a module configuration file. The method may include generating a module bonding diagram using a build diagram system module; selecting one or more SPICE models corresponding with the die; and generating a product SPICE model and a three dimensional model for the module semiconductor product. The method may include generating one or more datasheet characteristics of the module semiconductor product with at least the product SPICE model and the product simulation module, generating a product datasheet for the module semiconductor product using the datasheet formation module, and providing access to at least the module bonding diagram, the product SPICE model, the three dimensional model, and the product datasheet to the user.
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公开(公告)号:US20240128197A1
公开(公告)日:2024-04-18
申请号:US18487835
申请日:2023-10-16
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Olaf ZSCHIESCHANG , Oseob JEON , Jihwan KIM , Roveendra PAUL , Klaus NEUMAIER , Jerome TEYSSEYRE
IPC: H01L23/538 , H01L21/56 , H01L23/00
CPC classification number: H01L23/5389 , H01L21/56 , H01L24/24 , H01L24/82 , H01L25/072
Abstract: In a general aspect, an assembly includes a panel of organic substrate core material having a cavity defined therein, a module substrate disposed in the cavity, and a semiconductor die disposed on the module substrate. The assembly also includes a layer of prepreg organic substrate material, and a metal layer. The module substrate and the semiconductor die are embedded in the cavity by the layer of prepreg organic substrate material and the metal layer. The metal layer is electrically coupled with at least one of the semiconductor die or the module substrate.
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公开(公告)号:US20240028801A1
公开(公告)日:2024-01-25
申请号:US18479179
申请日:2023-10-02
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: James Joseph VICTORY , Klaus NEUMAIER , YunPeng XIAO , Jonathan HARPER , Vaclav VALENTA , Stanley BENCZKOWSKI , Thierry BORDIGNON , Wai Lun CHU
IPC: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08
CPC classification number: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08 , G06F2119/08
Abstract: Implementations of a method of designing a module semiconductor product may include receiving a selection of a module type, one or more die, a placement of one or more wires, clips, or pins; and generating, using a processor, a module configuration file. The method may include generating a module bonding diagram using a build diagram system module; selecting one or more SPICE models corresponding with the die; and generating a product SPICE model and a three dimensional model for the module semiconductor product. The method may include generating one or more datasheet characteristics of the module semiconductor product with at least the product SPICE model and the product simulation module, generating a product datasheet for the module semiconductor product using the datasheet formation module, and providing access to at least the module bonding diagram, the product SPICE model, the three dimensional model, and the product datasheet to the user.
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