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公开(公告)号：US20240028801A1
公开(公告)日：2024-01-25
申请号：US18479179
申请日：2023-10-02
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： James Joseph VICTORY , Klaus NEUMAIER , YunPeng XIAO , Jonathan HARPER , Vaclav VALENTA , Stanley BENCZKOWSKI , Thierry BORDIGNON , Wai Lun CHU
IPC: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08
CPC classification number: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08 , G06F2119/08
Abstract: Implementations of a method of designing a module semiconductor product may include receiving a selection of a module type, one or more die, a placement of one or more wires, clips, or pins; and generating, using a processor, a module configuration file. The method may include generating a module bonding diagram using a build diagram system module; selecting one or more SPICE models corresponding with the die; and generating a product SPICE model and a three dimensional model for the module semiconductor product. The method may include generating one or more datasheet characteristics of the module semiconductor product with at least the product SPICE model and the product simulation module, generating a product datasheet for the module semiconductor product using the datasheet formation module, and providing access to at least the module bonding diagram, the product SPICE model, the three dimensional model, and the product datasheet to the user.
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公开(公告)号：US20240119206A1
公开(公告)日：2024-04-11
申请号：US18539697
申请日：2023-12-14
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： James Joseph VICTORY , Thomas NEYER , YunPeng XIAO , Hyeongwoo JANG , Peter DINGENEN , Vaclav VALENTA , Mehrdad BAGHAIE YAZDI , Christopher Lawrence REXER , Stanley BENCZKOWSKI , Thierry BORDIGNON , Wai Lun CHU , Roman SICKARUK
IPC: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08
CPC classification number: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08 , G06F2119/08
Abstract: Implementations disclosed herein may include receiving from a user a selection of at least one die, a package type, and at least one test condition; generating, using a processor, a product die configuration and a product package configuration using a predictive modeling module and the at least one die and the package type; generating a graphic design system file; generating a package bonding diagram; generating a product spice model of the discrete device product using a technology computer aided design module; generating, using a processor, one or more datasheet characteristics of the discrete device product with the product SPICE model; generating a product datasheet for the discrete device product using the graphic design system file; and using a second interface generated by a computing device to provide access to the graphic design system file, the package bonding diagram, the product datasheet, and the product SPICE model.
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公开(公告)号：US20210134997A1
公开(公告)日：2021-05-06
申请号：US16675813
申请日：2019-11-06
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Kevin Kyuheon CHO , Bongyong LEE , Kyeongseok PARK , Doojin CHOI , Thomas NEYER , James Joseph VICTORY
Abstract: A power device includes a silicon carbide substrate. A gate is provided on a first side of the silicon carbide substrate. A graded channel includes a first region having a first dopant concentration and a second region having a second dopant concentration, the second dopant concentration being greater than the first dopant concentration.
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公开(公告)号：US20230215941A1
公开(公告)日：2023-07-06
申请号：US18182140
申请日：2023-03-10
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Kevin Kyuheon CHO , Bongyong LEE , Kyeongseok PARK , Doojin CHOI , Thomas NEYER , James Joseph VICTORY
CPC classification number: H01L29/7802 , H01L21/046 , H01L29/66068 , H01L29/1608
Abstract: A power device includes a silicon carbide substrate. A gate is provided on a first side of the silicon carbide substrate. A graded channel includes a first region having a first dopant concentration and a second region having a second dopant concentration, the second dopant concentration being greater than the first dopant concentration.
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公开(公告)号：US20230004699A1
公开(公告)日：2023-01-05
申请号：US17930081
申请日：2022-09-07
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： James Joseph VICTORY , Klaus NEUMAIER , YunPeng XIAO , Jonathan HARPER , Vaclav VALENTA , Stanley BENCZKOWSKI , Thierry BORDIGNON , Wai Lun CHU
IPC: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08
Abstract: Implementations of a method of designing a module semiconductor product may include receiving a selection of a module type, one or more die, a placement of one or more wires, clips, or pins; and generating, using a processor, a module configuration file. The method may include generating a module bonding diagram using a build diagram system module; selecting one or more SPICE models corresponding with the die; and generating a product SPICE model and a three dimensional model for the module semiconductor product. The method may include generating one or more datasheet characteristics of the module semiconductor product with at least the product SPICE model and the product simulation module, generating a product datasheet for the module semiconductor product using the datasheet formation module, and providing access to at least the module bonding diagram, the product SPICE model, the three dimensional model, and the product datasheet to the user.
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Patent Agency Ranking
公开(公告)号：US20240427972A1
公开(公告)日：2024-12-26
申请号：US18648952
申请日：2024-04-29
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Klaus NEUMAIER , James Joseph VICTORY , Vaclav VALENTA , Sameer YADAV , Wai Lun CHU
IPC: G06F30/31 , G06F111/20
Abstract: Implementations of an object file for modeling using a three dimensional modeling module may include a first object defined as a root object, the first object corresponding with a first component of a semiconductor package; a second object corresponding with a second component of the semiconductor package directly physically coupled to the first component of the semiconductor package, the second object including a reference to the root object; and at least a third object corresponding with a third component of the semiconductor package, the third object including a reference to the root object, the third component of the semiconductor package directly coupled with a fourth component of the semiconductor package indirectly physically coupled to the second component of the semiconductor package.
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公开(公告)号：US20240169136A1
公开(公告)日：2024-05-23
申请号：US18058382
申请日：2022-11-23
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Yun Peng XIAO , James Joseph VICTORY , Bejoy N. PUSHPAKARAN , Ondrej PICHA , Wai Lun CHU , Sravan VANAPARTHY
IPC: G06F30/367
CPC classification number: G06F30/367
Abstract: Implementations of a method of generating a product system model may include, using a first interface, receiving from a user a selection of a product type; selecting a product SPICE model associated with the product type from a database of product SPICE models; and using a second interface, receiving from the user a selection of a process condition. The method may include, using a third interface, receiving from the user one or more system characteristics and one or more operating characteristics; using a fourth interface, receiving from the user one or more circuit characteristics; using a SPICE model simulation module, generating a SPICE model output with the product SPICE model, and, using a formatting module, formatting the SPICE model output into a product system model file, the product system model file including one of a structured text file, a plain text file, or a delimited text file.
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公开(公告)号：US20230004700A1
公开(公告)日：2023-01-05
申请号：US17930091
申请日：2022-09-07
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： James Joseph VICTORY , Thomas NEYER , YunPeng XIAO , Hyeongwoo JANG , Peter DINGENEN , Vaclav VALENTA , Mehrdad BAGHAIE YAZDI , Christopher Lawrence REXER , Stanley BENCZKOWSKI , Thierry BORDIGNON , Wai Lun CHU , Roman SICKARUK
IPC: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08
Abstract: Implementations disclosed herein may include receiving from a user a selection of at least one die, a package type, and at least one test condition; generating, using a processor, a product die configuration and a product package configuration using a predictive modeling module and the at least one die and the package type; generating a graphic design system file; generating a package bonding diagram; generating a product spice model of the discrete device product using a technology computer aided design module; generating, using a processor, one or more datasheet characteristics of the discrete device product with the product SPICE model; generating a product datasheet for the discrete device product using the graphic design system file; and using a second interface generated by a computing device to provide access to the graphic design system file, the package bonding diagram, the product datasheet, and the product SPICE model.
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公开(公告)号：US20210117599A1
公开(公告)日：2021-04-22
申请号：US17076072
申请日：2020-10-21
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： James Joseph VICTORY , Klaus NEUMAIER , YunPeng XIAO , Jonathan HARPER , Vaclav VALENTA , Stanley BENCZKOWSKI , Thierry BORDIGNON , Wai Lun CHU
IPC: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398
Abstract: Implementations of a method of designing a module semiconductor product may include receiving a selection of a module type, one or more die, a placement of one or more wires, clips, or pins; and generating, using a processor, a module configuration file. The method may include generating a module bonding diagram using a build diagram system module; selecting one or more SPICE models corresponding with the die; and generating a product SPICE model and a three dimensional model for the module semiconductor product. The method may include generating one or more datasheet characteristics of the module semiconductor product with at least the product SPICE model and the product simulation module, generating a product datasheet for the module semiconductor product using the datasheet formation module, and providing access to at least the module bonding diagram, the product SPICE model, the three dimensional model, and the product datasheet to the user.
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公开(公告)号：US20210117598A1
公开(公告)日：2021-04-22
申请号：US17076039
申请日：2020-10-21
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： James Joseph VICTORY , Thomas NEYER , YunPeng XIAO , Hyeongwoo JANG , Peter DINGENEN , Vaclav VALENTA , Tirthajyoti SARKAR , Mehrdad BAGHAIE YAZDI , Christopher Lawrence REXER , Stanley BENCZKOWSKI , Thierry BORDIGNON , Wai Lun CHU , Roman SICKARUK
IPC: G06F30/31 , G06F30/367 , G06N3/08 , G06N3/04
Abstract: Implementations disclosed herein may include receiving from a user a selection of at least one die, a package type, and at least one test condition; generating, using a processor, a product die configuration and a product package configuration using a predictive modeling module and the at least one die and the package type; generating a graphic design system file; generating a package bonding diagram; generating a product spice model of the discrete device product using a technology computer aided design module; generating, using a processor, one or more datasheet characteristics of the discrete device product with the product SPICE model; generating a product datasheet for the discrete device product using the graphic design system file; and using a second interface generated by a computing device to provide access to the graphic design system file, the package bonding diagram, the product datasheet, and the product SPICE model.
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