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公开(公告)号:US20220310813A1
公开(公告)日:2022-09-29
申请号:US17653235
申请日:2022-03-02
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Zia HOSSAIN , Balaji PADMANABHAN , Sauvik CHOWDHURY
IPC: H01L29/423 , H01L29/66 , H01L29/78 , H01L29/40
Abstract: A device includes a mesa disposed between a pair of vertical trenches in a semiconductor substrate. A gate electrode is disposed in each of the pair of vertical trenches, and a shield electrode is disposed below each of the gate electrodes in the pair of vertical trenches. The device further includes a bridge connection trench traversing the mesa. The bridge connection trench is in fluid communication with each of the pair of vertical trenches. A bridge shield electrode is disposed in the bridge connection trench and is coupled to the shield electrode disposed below each of the gate electrodes in the pair of vertical trenches.
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2.
公开(公告)号:US20230282732A1
公开(公告)日:2023-09-07
申请号:US17653226
申请日:2022-03-02
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Balaji PADMANABHAN , Zia HOSSAIN , Dean E. PROBST , Peter A. BURKE , Sauvik CHOWDHURY
CPC classification number: H01L29/66734 , H01L29/401 , H01L29/407
Abstract: A process of forming an electronic device can form an accumulation channel or an integrated diode by selective doping parts of a workpiece. In an embodiment, a doped region can be formed by implanting a sidewall of a body region. In another embodiment, a doped region can correspond to a remaining portion of a semiconductor layer after forming another doped region by implanting into a contact opening. The accumulation channel or the integrated diode can lower the barrier for a body diode turn-on. Reduced stored charge and QRR may be achieved, leading to lower switching losses.
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公开(公告)号:US20230253468A1
公开(公告)日:2023-08-10
申请号:US17650456
申请日:2022-02-09
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Zia HOSSAIN , Balaji PADMANABHAN , Christopher Lawrence REXER , Gordon M. GRIVNA , Sauvik CHOWDHURY
IPC: H01L29/423 , H01L29/78 , H01L29/40 , H01L29/66
CPC classification number: H01L29/4236 , H01L29/7813 , H01L29/7811 , H01L29/408 , H01L29/66734
Abstract: In one general aspect, an apparatus can include a substrate having a semiconductor region, and a trench defined in the semiconductor region and having a sidewall. The apparatus can include a shield electrode disposed in the trench and insulated from the sidewall of the trench by a shield dielectric, the shield dielectric having a low-k dielectric portion and a high-k dielectric portion. The apparatus can include a gate electrode disposed in the trench and at least partially surrounded by a gate dielectric, and an inter-electrode dielectric disposed between the shield electrode and the gate electrode.
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公开(公告)号:US20240413196A1
公开(公告)日:2024-12-12
申请号:US18701585
申请日:2023-09-11
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Sauvik CHOWDHURY , Zia HOSSAIN , Joseph Andrew YEDINAK
Abstract: Shielded gate semiconductor devices are disclosed for use in high power applications such as electric vehicles and industrial applications. The devices are formed as mesa (106)/trench (400) structures in which shielded gate electrodes are formed in the trenches. Various trench structures (400, 500, 600, 700) are presented that include tapered portions (401) and end tabs (502, 602, 702, 802) that can be beneficial in managing the distribution of electric charge and associated electric fields. The tapered trenches (400) can be used to increase and stabilize breakdown voltages in a termination region (104) of a semiconductor die (100).
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公开(公告)号:US20230113308A1
公开(公告)日:2023-04-13
申请号:US17938096
申请日:2022-10-05
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Balaji PADMANABHAN , Prasad VENKATRAMAN , Sauvik CHOWDHURY
IPC: H01L29/78 , H01L29/66 , H01L21/265 , H01L29/06 , H01L29/423
Abstract: In a general aspect, a vertical transistor can include a semiconductor region of a first conductivity type, and a plurality of perpendicularly intersecting trenches having a shielded gate structure of the vertical transistor disposed therein. A mesa of the semiconductor region can be defined by the plurality of perpendicularly intersecting trenches. The mesa can include a proximal end portion having a first doping concentration of the first conductivity type, a distal end portion having the first doping concentration of the first conductivity type, and a central portion disposed between the proximal end portion and the distal end portion. The central portion can have a second doping concentration of the first conductivity type that is less than the first doping concentration.
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