公开(公告)号：US20160007452A1

公开(公告)日：2016-01-07

申请号：US14647412

申请日：2014-02-19

Applicant: SHENGYI TECHNOLOGY CO., LTD.

Inventor： Shanyin YAN ,  Xianping ZENG ,  Yongjing XU ,  Zhongqiang YANG ,  Xiaosheng SU ,  Li Luo

IPC: H05K1/03 ,  H05K3/00 ,  C03C25/30 ,  C03C25/16 ,  C03C25/36 ,  C03C25/32

CPC classification number: H05K1/0306 ,  C03C25/16 ,  C03C25/30 ,  C03C25/326 ,  C03C25/36 ,  C08J5/24 ,  C08J2323/20 ,  C08J2363/00 ,  C08J2371/12 ,  C08J2379/04 ,  H05K1/0366 ,  H05K1/0393 ,  H05K3/0011 ,  H05K3/0085 ,  H05K2201/029

Abstract: The present invention relates to a process for preparing a bonding sheet for composing circuit substrate, comprising pre-treating glass fabrics with a pre-treating varnish having a same or close dielectric constant (DK) to glass fabrics being used. The present invention further relates to bonding sheets prepared by the process, as well as circuit substrate. The process for preparing circuit substrate of the invention, which has a lower cost, does not need to upgrade or adjust the equipment. The circuit substrates prepared thereby have less warp-wise and weft-wise difference in dielectric constant, and thus can effectively solve the problem of signal time delay.

Abstract translation: 本发明涉及一种制备用于构成电路基板的接合片的方法，包括用玻璃织物预处理玻璃织物与具有相同或接近介电常数（DK）的预处理清漆。 本发明还涉及通过该方法制备的粘合片以及电路基片。 本发明的具有较低成本的电路基板的制造方法不需要升级或调整设备。 由此制备的电路基板在介电常数方面具有较少的经向和纬向差异，因此可以有效地解决信号时间延迟的问题。