公开(公告)号：US20150102484A1

公开(公告)日：2015-04-16

申请号：US14136238

申请日：2013-12-20

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD

Inventor： Chia-Cheng Chen ,  Ming-Chen Sun ,  Tzu-Chieh Shen ,  Liang-yi Hung ,  Wei-chung Hsiao ,  Yu-cheng Pai ,  Shih-Chao Chiu ,  Don-Son Jiang ,  Yi-Feng Chang ,  Lung-Yuan Wang

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/535

CPC classification number: H01L25/105 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2225/1011 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/181 ,  H05K1/181 ,  H05K1/183 ,  H05K3/284 ,  H05K2201/10515 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A package structure is disclosed, which includes: a first substrate; a build-up layer formed on and electrically connected to the first substrate and having a cavity; at least an electronic element disposed in the cavity and electrically connected to the first substrate; a stack member disposed on the build-up layer so as to be stacked on the first substrate; and an encapsulant formed between the build-up layer and the stack member. The build-up layer facilitates to achieve a stand-off effect and prevent solder bridging.

Abstract translation: 公开了一种封装结构，其包括：第一基板; 形成在第一基板上并电连接到第一基板并具有空腔的积聚层; 至少电子元件设置在所述空腔中并电连接到所述第一基板; 堆叠构件，其设置在堆积层上以堆叠在第一基板上; 以及形成在堆积层和堆叠构件之间的密封剂。 堆积层有助于实现隔离效应并防止焊料桥接。

公开(公告)号：US20150179598A1

公开(公告)日：2015-06-25

申请号：US14183896

申请日：2014-02-19

Applicant: Siliconware Precision Industries Co., Ltd

Inventor： Shih-Chao Chiu ,  Liang-yi Hung

IPC: H01L23/00 ,  H01L23/28

CPC classification number: H01L24/16 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16058 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/014

Abstract: A flip-chip packaging structure is provided, which includes: a packaging substrate having a substrate body and a circuit layer formed on the substrate body, wherein the circuit layer has a plurality of conductive pads embedded in the substrate body and exposed from a surface of the substrate body; and a chip disposed on and electrically connected to the packaging substrate through a plurality of conductive elements, wherein the conductive elements and the exposed portions of the conductive pads have a width ratio in a range of 0.7 to 1.3, thereby improving the product yield and reliability.

Abstract translation: 提供了一种倒装芯片封装结构，其包括：具有基板主体和形成在基板主体上的电路层的封装基板，其中电路层具有嵌入在基板主体中的多个导电焊盘，并从 基体; 以及通过多个导电元件设置在电气连接到封装衬底上的芯片，其中导电元件和导电焊盘的暴露部分的宽度比在0.7至1.3的范围内，从而提高了产品的产量和可靠性 。