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公开(公告)号：US20210375783A1
公开(公告)日：2021-12-02
申请号：US16931180
申请日：2020-07-16
发明人： Chih-Hsien Chiu , Wen-Jung Tsai , Yu-Wei Yeh , Tsung-Hsien Tsai , Chi-Liang Shih , Sheng-Ming Yang , Ping-Hung Liao
IPC分类号： H01L23/552 , H01L23/00 , H01L23/31 , H01L23/498
摘要： An electronic package is provided and uses a plurality of bonding wires as a shielding structure. The bonding wires are stitch bonded onto a carrier carrying electronic components, such that the problem of the shielding structure peeling off or falling off from the carrier can be avoided due to the fact that the bonding wires are not affected by temperature, humidity and other environmental factors.
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公开(公告)号：US20150243574A1
公开(公告)日：2015-08-27
申请号：US14256496
申请日：2014-04-18
发明人： Chi-Liang Shih , Hsin-Lung Chung , Te-Fang Chu , Sheng-Ming Yang , Hung-Cheng Chen , Chia-Yang Chen
IPC分类号： H01L23/31 , H01L23/00 , H01L23/498 , H01L21/56
CPC分类号： H01L23/49838 , H01L23/3128 , H01L23/49816 , H01L23/50 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/46 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/92 , H01L2224/27436 , H01L2224/2919 , H01L2224/32225 , H01L2224/32268 , H01L2224/451 , H01L2224/48227 , H01L2224/49175 , H01L2224/73265 , H01L2224/83191 , H01L2224/83385 , H01L2224/92247 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/19103 , H01L2924/19105 , H01L2224/45099 , H01L2924/00012 , H01L2924/00
摘要： A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.
摘要翻译： 提供了一种制造半导体封装的方法，其包括以下步骤：提供具有多个焊盘和相对的第二表面的具有第一表面的封装基板; 在所述包装基板的第一表面上设置多个无源元件; 通过粘合膜将半导体芯片设置在无源元件上; 通过多个接合线电连接半导体芯片和接合焊盘; 以及在所述封装衬底的所述第一表面上形成密封剂以封装所述半导体芯片，所述无源元件和所述接合线。 通过在封装基板和半导体芯片之间配置无源元件，本发明节约了封装基板上的空间，增加了布线灵活性。 此外，由于接合线不容易与无源元件接触，所以本发明防止发生短路。
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公开(公告)号：US20230082767A1
公开(公告)日：2023-03-16
申请号：US17989554
申请日：2022-11-17
发明人： Chih-Hsien Chiu , Wen-Jung Tsai , Yu-Wei Yeh , Tsung-Hsien Tsai , Chi-Liang Shih , Sheng-Ming Yang , Ping-Hung Liao
IPC分类号： H01L23/552 , H01L23/00 , H01L23/31 , H01L23/498
摘要： An electronic package is provided and uses a plurality of bonding wires as a shielding structure. The bonding wires are stitch bonded onto a carrier carrying electronic components, such that the problem of the shielding structure peeling off or falling off from the carrier can be avoided due to the fact that the bonding wires are not affected by temperature, humidity and other environmental factors.
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公开(公告)号：US11532568B2
公开(公告)日：2022-12-20
申请号：US16931180
申请日：2020-07-16
发明人： Chih-Hsien Chiu , Wen-Jung Tsai , Yu-Wei Yeh , Tsung-Hsien Tsai , Chi-Liang Shih , Sheng-Ming Yang , Ping-Hung Liao
IPC分类号： H01L23/552 , H01L23/00 , H01L23/31 , H01L23/498
摘要： An electronic package is provided and uses a plurality of bonding wires as a shielding structure. The bonding wires are stitch bonded onto a carrier carrying electronic components, such that the problem of the shielding structure peeling off or falling off from the carrier can be avoided due to the fact that the bonding wires are not affected by temperature, humidity and other environmental factors.
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公开(公告)号：US09343401B2
公开(公告)日：2016-05-17
申请号：US14256496
申请日：2014-04-18
发明人： Chi-Liang Shih , Hsin-Lung Chung , Te-Fang Chu , Sheng-Ming Yang , Hung-Cheng Chen , Chia-Yang Chen
CPC分类号： H01L23/49838 , H01L23/3128 , H01L23/49816 , H01L23/50 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/46 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/92 , H01L2224/27436 , H01L2224/2919 , H01L2224/32225 , H01L2224/32268 , H01L2224/451 , H01L2224/48227 , H01L2224/49175 , H01L2224/73265 , H01L2224/83191 , H01L2224/83385 , H01L2224/92247 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/19103 , H01L2924/19105 , H01L2224/45099 , H01L2924/00012 , H01L2924/00
摘要： A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.
摘要翻译： 提供了一种制造半导体封装的方法，其包括以下步骤：提供具有多个焊盘和相对的第二表面的具有第一表面的封装基板; 在所述包装基板的第一表面上设置多个无源元件; 通过粘合膜将半导体芯片设置在无源元件上; 通过多个接合线电连接半导体芯片和接合焊盘; 以及在所述封装衬底的所述第一表面上形成密封剂以封装所述半导体芯片，所述无源元件和所述接合线。 通过在封装基板和半导体芯片之间配置无源元件，本发明节约了封装基板上的空间，增加了布线灵活性。 此外，由于接合线不容易与无源元件接触，所以本发明防止发生短路。
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