公开(公告)号：US20240275573A1

公开(公告)日：2024-08-15

申请号：US18644860

申请日：2024-04-24

申请人： SK hynix Inc.

发明人： Dae Sik PARK ,  Byung Cheol KANG ,  Seung Duk CHO

IPC分类号： H04L7/00 ,  H04L7/033

CPC分类号： H04L7/005 ,  H04L7/0079 ,  H04L7/0091 ,  H04L7/033

摘要： A method of operating an interface device including a first elastic buffer is provided. The method of operating the interface device includes performing a link equalization operation, checking a transmission mode of the interface device, and determining a transmission parameter of the interface device based on a status of the first elastic buffer or a status of a second elastic buffer included in another interface device communicating with the interface device when the transmission mode is a transmission parameter adjustment mode.

公开(公告)号：US20230353341A1

公开(公告)日：2023-11-02

申请号：US18350220

申请日：2023-07-11

申请人： SK hynix Inc.

发明人： Yong Tae JEON ,  Dae Sik PARK ,  Jae Young JANG ,  Byung Cheol KANG ,  Seung Duk CHO

IPC分类号： H04L7/00 ,  H04L7/033

CPC分类号： H04L7/005 ,  H04L7/033 ,  H04L7/0091 ,  H04L7/0079

摘要： Interface devices and systems that include interface devices are disclosed. In some implementations, a device includes a transceiver configured to transmit and receive data, a lane margining controller in communication with the transceiver and configured to control the transceiver to transmit, through a margin command, to an external device, a request for requesting a state of an elastic buffer of the external device, and control the transceiver to receive the state of the elastic buffer of from the external device, and a port setting controller adjust a clock frequency range of a spread spectrum clocking scheme based on the state of the elastic buffer.

公开(公告)号：US20220311590A1

公开(公告)日：2022-09-29

申请号：US17840340

申请日：2022-06-14

申请人： SK hynix Inc.

发明人： Yong Tae JEON ,  Dae Sik PARK ,  Jae Young JANG ,  Byung Cheol KANG ,  Seung Duk CHO

IPC分类号： H04L7/00 ,  H04L7/033

摘要： Interface devices and systems that include interface devices are disclosed. In some implementations, a device includes a transceiver configured to transmit and receive data, a lane margining controller in communication with the transceiver and configured to control the transceiver to transmit, through a margin command, to an external device, a request for requesting a state of an elastic buffer of the external device, and control the transceiver to receive the state of the elastic buffer of from the external device, and a port setting controller adjust a clock frequency range of a spread spectrum clocking scheme based on the state of the elastic buffer.

公开(公告)号：US20240289295A1

公开(公告)日：2024-08-29

申请号：US18659773

申请日：2024-05-09

申请人： SK hynix Inc.

发明人： Yong Tae JEON ,  Byung Cheol KANG ,  Seung Duk CHO ,  Sang Hyun YOON ,  Se Hyeon HAN ,  Jae Young JANG

IPC分类号： G06F13/42 ,  G06F1/08 ,  G06F7/58 ,  G06F13/40

CPC分类号： G06F13/4221 ,  G06F1/08 ,  G06F7/588 ,  G06F13/4045

摘要： A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programmable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.

公开(公告)号：US20220327080A1

公开(公告)日：2022-10-13

申请号：US17504351

申请日：2021-10-18

申请人： SK hynix Inc.

发明人： Yong Tae JEON ,  Byung Cheol KANG ,  Seung Duk CHO

IPC分类号： G06F13/42 ,  G06F13/40 ,  G06F13/10 ,  G06F12/06

摘要： A peripheral component interconnect express (PCIe) device includes a plurality of common functions performing operations associated with a PCIe interface according to a function type of each of the plurality of common functions, each of the plurality of common functions being programmable to be a function type selected from a plurality function types, and a function type controller determining the function type of each of the plurality of common functions based on function type setting information provided from a host. Each function type may be a physical function type, a virtual function type, or a disable function type.

公开(公告)号：US20210391973A1

公开(公告)日：2021-12-16

申请号：US17349775

申请日：2021-06-16

申请人： SK hynix Inc.

发明人： Yong Tae JEON ,  Dae Sik PARK ,  Jae Young JANG ,  Byung Cheol KANG ,  Seung Duk CHO

IPC分类号： H04L7/00 ,  H04L7/033

摘要： Interface devices and systems that include interface devices are disclosed. In some implementations, a device includes a transceiver configured to transmit and receive data, a lane margining controller in communication with the transceiver and configured to control the transceiver to transmit, through a margin command, to an external device, a request for requesting a state of an elastic buffer of the external device, and control the transceiver to receive the state of the elastic buffer of from the external device, and a port setting controller adjust a clock frequency range of a spread spectrum clocking scheme based on the state of the elastic buffer.

公开(公告)号：US20240168911A1

公开(公告)日：2024-05-23

申请号：US18406919

申请日：2024-01-08

申请人： SK hynix Inc.

发明人： Yong Tae JEON ,  Byung Cheol KANG ,  Seung Duk CHO ,  Sang Hyun YOON ,  Se Hyeon HAN ,  Jae Young JANG

IPC分类号： G06F13/42 ,  G06F1/08 ,  G06F7/58 ,  G06F13/40

CPC分类号： G06F13/4221 ,  G06F1/08 ,  G06F7/588 ,  G06F13/4045

摘要： A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programmable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.

公开(公告)号：US20220327082A1

公开(公告)日：2022-10-13

申请号：US17506610

申请日：2021-10-20

申请人： SK hynix Inc.

发明人： Yong Tae JEON ,  Byung Cheol KANG ,  Seung Duk CHO ,  Sang Hyun YOON ,  Se Hyeon HAN ,  Jae Young JANG

IPC分类号： G06F13/42 ,  G06F13/40 ,  G06F7/58 ,  G06F1/08

摘要： A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.