Method for reducing output data noise of semiconductor apparatus and semiconductor apparatus implementing the same
    1.
    发明授权
    Method for reducing output data noise of semiconductor apparatus and semiconductor apparatus implementing the same 有权
    降低半导体装置的输出数据噪声的方法及其实施方法

    公开(公告)号:US08941406B2

    公开(公告)日:2015-01-27

    申请号:US13720992

    申请日:2012-12-19

    Applicant: SK Hynix Inc.

    CPC classification number: H03K3/013 G06F17/5022 H03K5/12

    Abstract: Provided is a method for reducing output data noise of a semiconductor apparatus which includes a plurality of output buffers to output data. The method includes the steps of: driving low data to a specific output buffer among the plurality of output buffers, and driving data transiting from a high level to a low level to the other output buffers; and measuring the magnitude of data noise occurring in output data of the specific output buffer, and deciding slew rates of the plurality of output buffers based on the measurement result.

    Abstract translation: 提供了一种减少包括多个输出缓冲器以输出数据的半导体装置的输出数据噪声的方法。 该方法包括以下步骤:将低数据驱动到多个输出缓冲器中的特定输出缓冲器,以及驱动数据从高电平转移到低电平到另一个输出缓冲器; 以及测量在特定输出缓冲器的输出数据中发生的数据噪声的大小,以及基于测量结果确定多个输出缓冲器的转换速率。

    STORAGE DEVICE AND OPERATING METHOD THEREOF

    公开(公告)号:US20220004338A1

    公开(公告)日:2022-01-06

    申请号:US16950071

    申请日:2020-11-17

    Applicant: SK hynix Inc.

    Abstract: There are provided a storage device and an operating method thereof. A memory controller includes: an operation mode controller for adjusting a standby entry time by using a host idle interval as an interval between host busy periods and a reference interval, and determining an operation mode, based on the adjusted standby entry time and a subsequent host idle interval; and an operation controller for controlling a memory device according to the operation mode.

    Storage device and operating method thereof

    公开(公告)号:US11379154B2

    公开(公告)日:2022-07-05

    申请号:US16950071

    申请日:2020-11-17

    Applicant: SK hynix Inc.

    Abstract: There are provided a storage device and an operating method thereof. A memory controller includes: an operation mode controller for adjusting a standby entry time by using a host idle interval as an interval between host busy periods and a reference interval, and determining an operation mode, based on the adjusted standby entry time and a subsequent host idle interval; and an operation controller for controlling a memory device according to the operation mode.

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