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1.发明授权Semiconductor memory device being capable of reducing program disturbance and program method thereof 有权半导体存储器件能够减少程序干扰及其编程方法公开(公告)号：US09236130B2
公开(公告)日：2016-01-12
申请号：US14190307
申请日：2014-02-26
申请人： SK hynix Inc.
发明人： Jung Woon Shim
CPC分类号： G11C16/10 , G11C16/0483 , G11C16/24 , G11C16/3427
摘要： Provided are a semiconductor memory device and an operating method thereof. The semiconductor memory device includes a memory cell array including a plurality of strings, wherein each of the plurality of strings includes a first memory cell group, and a second memory cell group and peripheral circuits configured to generate a first precharge voltage applied to the first memory cell group and a second precharge voltage applied to the second memory cell group when a channel precharge operation is performed during a program operation, and generate a program voltage to apply the program voltage to the memory cell array when a program voltage application is performed.
摘要翻译： 提供半导体存储器件及其操作方法。 半导体存储器件包括包括多个串的存储单元阵列，其中多个串中的每一个包括第一存储单元组和第二存储单元组以及被配置为产生施加到第一存储器的第一预充电电压的外围电路 单元组和在编程操作期间执行通道预充电操作时施加到第二存储单元组的第二预充电电压，并且当执行编程电压时，产生编程电压以将程序电压施加到存储单元阵列。
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2.发明授权Semiconductor memory device, system having the same and program method thereof 有权半导体存储器件，具有相同的系统及其程序方法公开(公告)号：US09042176B2
公开(公告)日：2015-05-26
申请号：US13948366
申请日：2013-07-23
申请人： SK hynix Inc.
发明人： Jung Woon Shim
CPC分类号： G11C16/24 , G11C16/0483 , G11C16/3418 , G11C16/3454
摘要： The present invention relates to a semiconductor memory device and a program method thereof. The program method according to an embodiment of the present invention includes: precharging a plurality of cell strings by providing a positive voltage to the plurality of cell strings through a common source line; and performing a program operation on selected memory cells by applying a program pulse to the selected memory cells.
摘要翻译： 本发明涉及半导体存储器件及其编程方法。 根据本发明的实施例的程序方法包括：通过公共源极线向多个单元串提供正电压来预充电多个单元串; 以及通过向选择的存储单元施加编程脉冲，对所选存储单元执行编程操作。
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公开(公告)号：US20140063968A1
公开(公告)日：2014-03-06
申请号：US13719201
申请日：2012-12-18
申请人： SK HYNIX INC.
发明人： Jung Woon Shim , Sung Jae Chung , Jin Gu Kim , Dong Hwan Lee , Seung Won Kim , Su Min Yi
CPC分类号： G11C16/10 , G11C16/0483 , G11C16/06 , G11C16/3459
摘要： A semiconductor memory device includes a memory block configured to include memory cells coupled to word lines and a peripheral circuit configured to perform a first program operation, a program verifying operation and a second program verifying operation for memory cells coupled to a word line selected from the word lines, and supply program allowable voltages having different levels to selected bit lines of program allowable cells located between program inhibition cells in the first program operation and the second program operation.
摘要翻译： 半导体存储器件包括：存储器块，被配置为包括耦合到字线的存储器单元和被配置为执行第一程序操作，外部电路的程序验证操作和用于耦合到从 字线，以及在第一程序操作中的位于程序禁止单元之间的程序允许单元的选择位线与第二程序操作之间具有不同电平的程序允许电压。
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公开(公告)号：US09330771B2
公开(公告)日：2016-05-03
申请号：US14619953
申请日：2015-02-11
申请人： SK hynix Inc.
发明人： Jung Woon Shim
CPC分类号： G11C16/14 , G11C16/0483 , G11C16/3445 , G11C16/3459
摘要： A semiconductor device includes memory strings each including a drain select transistor, memory cells and a source select transistor, which are connected between a bit line and a common source line and suitable for operating based on voltages applied to a drain select line, word lines and a source select line, respectively, and an operation circuit suitable for performing a pre-program operation, an erase operation and a post-program operation on the memory strings. The operation circuit sequentially performs erase operations on the drain select transistors included in the memory strings.
摘要翻译： 半导体器件包括各自包括漏极选择晶体管，存储单元和源极选择晶体管的存储器串，其连接在位线和公共源极线之间，并且适于基于施加到漏极选择线，字线和 源选择线，以及适用于对存储器串执行预编程操作，擦除操作和后编程操作的操作电路。 操作电路对包含在存储器串中的漏极选择晶体管顺序执行擦除操作。
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5.发明授权Semiconductor memory device including memory cell strings and method of operating the same 有权包括存储单元串的半导体存储器件及其操作方法公开(公告)号：US09117540B2
公开(公告)日：2015-08-25
申请号：US13971315
申请日：2013-08-20
申请人： SK hynix Inc.
发明人： Jung Woon Shim
CPC分类号： G11C16/3427 , G11C16/0441 , G11C16/0483 , G11C16/26 , G11C16/3418 , G11C16/3436
摘要： A semiconductor memory device includes memory cell strings including selection transistors and memory cells coupled between the selection transistors, a peripheral circuit configured to apply an operating voltage to the memory cell strings during a read operation or a verify operation, and a control circuit configured to control the peripheral circuit so that the operating voltage being applied to the selection transistors is controlled to reduce a potential level of a channel of the memory cell strings during the read operation or the verify operation.
摘要翻译： 半导体存储器件包括存储单元串，包括选择晶体管和耦合在选择晶体管之间的存储单元，外围电路被配置为在读取操作或验证操作期间向存储单元串施加工作电压，以及控制电路， 外围电路使得施加到选择晶体管的工作电压被控制以在读取操作或验证操作期间降低存储单元串的通道的电位电平。
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公开(公告)号：US09082488B2
公开(公告)日：2015-07-14
申请号：US13719201
申请日：2012-12-18
申请人： SK hynix Inc.
发明人： Jung Woon Shim , Sung Jae Chung , Jin Gu Kim , Dong Hwan Lee , Seung Won Kim , Su Min Yi
CPC分类号： G11C16/10 , G11C16/0483 , G11C16/06 , G11C16/3459
摘要： A semiconductor memory device includes a memory block configured to include memory cells coupled to word lines and a peripheral circuit configured to perform a first program operation, a program verifying operation and a second program verifying operation for memory cells coupled to a word line selected from the word lines, and supply program allowable voltages having different levels to selected bit lines of program allowable cells located between program inhibition cells in the first program operation and the second program operation.
摘要翻译： 半导体存储器件包括：存储器块，被配置为包括耦合到字线的存储器单元和被配置为执行第一程序操作，外部电路的程序验证操作和用于耦合到从 字线，以及在第一程序操作中的位于程序禁止单元之间的程序允许单元的选择位线与第二程序操作之间具有不同电平的程序允许电压。
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