公开(公告)号：US20240355406A1

公开(公告)日：2024-10-24

申请号：US18640912

申请日：2024-04-19

Applicant: Socionext Inc.

Inventor： Tatsushi OTSUKA ,  Yuya SHIGENOBU ,  Tokushi YAMAGUCHI

IPC: G11C29/12 ,  G11C29/00 ,  G11C29/38

CPC classification number: G11C29/1201 ,  G11C29/38 ,  G11C29/76

Abstract: A memory circuit includes: a plurality of memory parts, each of which includes a plurality of first memory cells and a second memory cell that is accessed when one of the first memory cells is defective; a plurality of first memory control parts, each of which is configured to control access to a corresponding one of the plurality of memory parts based on a first access request addressing the corresponding memory part, during a first mode; and a second memory control part shared by the plurality of memory parts, and configured to control access to the plurality of memory parts based on a second access request during a second mode.

公开(公告)号：US20210235070A1

公开(公告)日：2021-07-29

申请号：US17231470

申请日：2021-04-15

Applicant: SOCIONEXT INC.

Inventor： Yuya SHIGENOBU ,  Masao KITAGAWA

IPC: H04N19/103

Abstract: An image encoding method includes, using an image as input, determining a first mode suited to encode the image in accordance with a first processing procedure; using the image as input, determining a second mode suited to encode the image in accordance with a second processing procedure; selecting one of first mode and the second mode as a final mode; encoding the image, using the final mode; and calculating a cost of using the second mode to encode the image. The second processing procedure is implemented by a reconfigurable circuit. In the selecting, the first mode is selected when the cost calculated in the calculating is higher than a first predetermined value, and the second mode is selected when the cost is lower than or equal to the first predetermined value.