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公开(公告)号：US20210166757A1
公开(公告)日：2021-06-03
申请号：US17099257
申请日：2020-11-16
Applicant: STMicroelectronics S.r.l.
Inventor： Giovanni Campardo , Massimo Borghi , Paola Zuliani , Marco Barboni
Abstract: An embodiment phase-change memory device includes a memory array provided with a plurality of phase-change memory cells, each having a body made of phase-change material and a first state, in which the phase-change material is completely in an amorphous phase, and at least one second state, in which the phase-change material is partially in the amorphous phase and partially in a crystalline phase. A programming-pulse generator applies to the memory cells rectangular dynamic-programming pulses having an amplitude and a duration calibrated for switching the memory cells from the first state to the second state.
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公开(公告)号：US11462269B2
公开(公告)日：2022-10-04
申请号：US17099257
申请日：2020-11-16
Applicant: STMicroelectronics S.r.l.
Inventor： Giovanni Campardo , Massimo Borghi , Paola Zuliani , Marco Barboni
Abstract: An embodiment phase-change memory device includes a memory array provided with a plurality of phase-change memory cells, each having a body made of phase-change material and a first state, in which the phase-change material is completely in an amorphous phase, and at least one second state, in which the phase-change material is partially in the amorphous phase and partially in a crystalline phase. A programming-pulse generator applies to the memory cells rectangular dynamic-programming pulses having an amplitude and a duration calibrated for switching the memory cells from the first state to the second state.
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Patent Agency Ranking
公开(公告)号：US10510955B2
公开(公告)日：2019-12-17
申请号：US15953921
申请日：2018-04-16
Inventor： Pierre Morin , Michel Haond , Paola Zuliani
Abstract: A phase change memory includes an L-shaped resistive element having a first part that extends between a layer of phase change material and an upper end of a conductive via and a second part that rests at least partially on the upper end of the conductive via and may further extend beyond a peripheral edge of the conductive via. The upper part of the conductive via is surrounded by an insulating material that is not likely to adversely react with the metal material of the resistive element.
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公开(公告)号：US10706924B2
公开(公告)日：2020-07-07
申请号：US16393115
申请日：2019-04-24
Applicant: STMicroelectronics S.r.l.
Inventor： Giovanni Campardo , Roberto Annunziata , Paola Zuliani
Abstract: A non-volatile memory device has a circuit branch associated to a bit line connected to a memory cell. When the memory cell is read, in a precharging step, the bit line is precharged. In a characteristic shift step, the memory cell is activated, and a current source is activated to supply a shift current to the first bit line and cause the bit line to charge or discharge on the basis of the datum stored in the memory cell. In a detection step, the current source is deactivated, the memory cell is decoupled, and the bit line is coupled to an input of a comparator stage that compares the voltage on the bit line with a reference voltage to supply an output signal indicating a datum stored in the memory cell.
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公开(公告)号：US10903423B2
公开(公告)日：2021-01-26
申请号：US16708604
申请日：2019-12-10
Inventor： Pierre Morin , Michel Haond , Paola Zuliani
Abstract: A phase change memory includes an L-shaped resistive element having a first part that extends between a layer of phase change material and an upper end of a conductive via and a second part that rests at least partially on the upper end of the conductive via and may further extend beyond a peripheral edge of the conductive via. The upper part of the conductive via is surrounded by an insulating material that is not likely to adversely react with the metal material of the resistive element.
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公开(公告)号：US20190341103A1
公开(公告)日：2019-11-07
申请号：US16393115
申请日：2019-04-24
Applicant: STMicroelectronics S.r.l.
Inventor： Giovanni Campardo , Roberto Annunziata , Paola Zuliani
IPC: G11C13/00
Abstract: A non-volatile memory device has a circuit branch associated to a bit line connected to a memory cell. When the memory cell is read, in a precharging step, the bit line is precharged. In a characteristic shift step, the memory cell is activated, and a current source is activated to supply a shift current to the first bit line and cause the bit line to charge or discharge on the basis of the datum stored in the memory cell. In a detection step, the current source is deactivated, the memory cell is decoupled, and the bit line is coupled to an input of a comparator stage that compares the voltage on the bit line with a reference voltage to supply an output signal indicating a datum stored in the memory cell.
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公开(公告)号：US09991316B2
公开(公告)日：2018-06-05
申请号：US15374304
申请日：2016-12-09
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Paola Zuliani , Gianluigi Confalonieri , Annalisa Gilardini , Carlo Luigi Prelini
CPC classification number: H01L27/2463 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1293 , H01L45/144 , H01L45/16 , H01L45/1683
Abstract: A phase-change memory cell, comprising: a substrate housing a transistor, for selection of the memory cell, that includes a first conduction electrode; a first electrical-insulation layer on the selection transistor; a first conductive through via through the electrical-insulation layer electrically coupled to the first conduction electrode; a heater element including a first portion in electrical contact with the first conductive through via and a second portion that extends in electrical continuity with, and orthogonal to, the first portion; a first protection element extending on the first and second portions of the heater element; a second protection element extending in direct lateral contact with the first portion of the heater element and with the first protection element; and a phase-change region extending over the heater element in electrical and thermal contact therewith.
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