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公开(公告)号:US20210057521A1
公开(公告)日:2021-02-25
申请号:US16995079
申请日:2020-08-17
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Alexis GAUTHIER , Pascal CHEVALIER , Gregory AVENIER
IPC: H01L29/06 , H01L29/66 , H01L21/8222 , H01L29/732
Abstract: A transistor is produced by forming a first part of a first region of the transistor in a semiconductor substrate by implanting dopants through an opening in an isolating trench formed at an upper surface of the semiconductor substrate. A second region of the transistor in the opening by epitaxy.
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公开(公告)号:US20220254686A1
公开(公告)日:2022-08-11
申请号:US17728088
申请日:2022-04-25
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Gregory AVENIER , Alexis GAUTHIER , Pascal CHEVALIER
IPC: H01L21/8222 , H01L27/06 , H01L29/66 , H01L29/737 , H01L29/93 , H01L21/3105 , H01L21/8249
Abstract: A circuit includes at least one bipolar transistor and at least one variable capacitance diode. The circuit is fabricated using a method whereby the bipolar transistor and variable capacitance diode are jointly produced on a common substrate.
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公开(公告)号:US20220149151A1
公开(公告)日:2022-05-12
申请号:US17584593
申请日:2022-01-26
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Alexis GAUTHIER , Pascal CHEVALIER , Gregory AVENIER
IPC: H01L29/06 , H01L29/66 , H01L29/732
Abstract: A device including a transistor is fabricated by forming a first part of a first region of the transistor through the implantation of dopants through a first opening. The second region of the transistor is then formed in the first opening by epitaxy.
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公开(公告)号:US20220130728A1
公开(公告)日:2022-04-28
申请号:US17568500
申请日:2022-01-04
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Pascal CHEVALIER , Alexis GAUTHIER , Gregory AVENIER
IPC: H01L21/8222 , H01L21/265 , H01L27/06 , H01L29/06 , H01L29/66 , H01L29/737 , H01L29/93
Abstract: At least one bipolar transistor and at least one variable capacitance diode are jointly produced by a method on a common substrate.
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公开(公告)号:US20240162328A1
公开(公告)日:2024-05-16
申请号:US18387627
申请日:2023-11-07
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Alexis GAUTHIER , Pascal CHEVALIER , Edoardo BREZZA , Nicolas GUITARD , Gregory AVENIER
CPC classification number: H01L29/66234 , H01L29/0804 , H01L29/0821 , H01L29/1004
Abstract: A bipolar transistor is manufactured by: forming a collector region; forming a first layer made of a material of a base region and an insulating second layer; forming a cavity reaching the collector region; forming a portion of the collector region and a portion of the base region in the cavity; forming an insulating fourth layer made of a same material as the insulating second layer in the periphery of the bottom of the cavity, the insulating fourth layer having a same thickness as the insulating second layer; forming an emitter region; and simultaneously removing the insulating second and a portion of the insulating fourth layer not covered by the emitter region.
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公开(公告)号:US20220254879A1
公开(公告)日:2022-08-11
申请号:US17734486
申请日:2022-05-02
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Alexis GAUTHIER , Pascal CHEVALIER , Gregory AVENIER
IPC: H01L29/06 , H01L21/8222 , H01L29/66 , H01L29/732
Abstract: A transistor is produced by forming a first part of a first region of the transistor in a semiconductor substrate by implanting dopants through an opening in an isolating trench formed at an upper surface of the semiconductor substrate. A second region of the transistor in the opening by epitaxy.
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公开(公告)号:US20210057520A1
公开(公告)日:2021-02-25
申请号:US16995054
申请日:2020-08-17
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Alexis GAUTHIER , Pascal CHEVALIER , Gregory AVENIER
IPC: H01L29/06 , H01L29/66 , H01L29/732
Abstract: A device including a transistor is fabricated by forming a first part of a first region of the transistor through the implantation of dopants through a first opening. The second region of the transistor is then formed in the first opening by epitaxy.
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公开(公告)号:US20190148531A1
公开(公告)日:2019-05-16
申请号:US16250182
申请日:2019-01-17
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Alexis GAUTHIER , Pascal CHEVALIER , Gregory AVENIER
IPC: H01L29/732 , H01L21/3105 , H01L29/66 , H01L29/10 , H01L29/06 , H01L29/08
CPC classification number: H01L29/7322 , H01L21/31056 , H01L29/0649 , H01L29/0804 , H01L29/0821 , H01L29/1004 , H01L29/66242 , H01L29/66272 , H01L29/732 , H01L29/737
Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening formed in a stack of insulating layers that includes a sacrificial layer. The sacrificial layer is selectively removed to expose a side wall of the base region. Epitaxial growth from the exposed sidewall forms a base contact region.
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