公开(公告)号：US20210057521A1

公开(公告)日：2021-02-25

申请号：US16995079

申请日：2020-08-17

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER ,  Gregory AVENIER

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/8222 ,  H01L29/732

Abstract: A transistor is produced by forming a first part of a first region of the transistor in a semiconductor substrate by implanting dopants through an opening in an isolating trench formed at an upper surface of the semiconductor substrate. A second region of the transistor in the opening by epitaxy.

公开(公告)号：US20220254686A1

公开(公告)日：2022-08-11

申请号：US17728088

申请日：2022-04-25

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Gregory AVENIER ,  Alexis GAUTHIER ,  Pascal CHEVALIER

IPC: H01L21/8222 ,  H01L27/06 ,  H01L29/66 ,  H01L29/737 ,  H01L29/93 ,  H01L21/3105 ,  H01L21/8249

Abstract: A circuit includes at least one bipolar transistor and at least one variable capacitance diode. The circuit is fabricated using a method whereby the bipolar transistor and variable capacitance diode are jointly produced on a common substrate.

公开(公告)号：US20220059672A1

公开(公告)日：2022-02-24

申请号：US17401881

申请日：2021-08-13

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Edoardo BREZZA ,  Pascal CHEVALIER

IPC: H01L29/66 ,  H01L21/762 ,  H01L29/08 ,  H01L29/732

Abstract: A bipolar transistor includes a stack of an emitter, a base, and a collector. The base is structured to have a comb shape including fingers oriented in a plane orthogonal to a stacking direction of the stack.

公开(公告)号：US20220013654A1

公开(公告)日：2022-01-13

申请号：US17486000

申请日：2021-09-27

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER

IPC: H01L29/66 ,  H01L21/22 ,  H01L29/06 ,  H01L29/73

Abstract: A bipolar transistor includes a collector. The collector is produced by a process wherein a first substantially homogeneously doped layer is formed at the bottom of a cavity. A second gradually doped layer is then formed by diffusion of dopants of the first substantially homogeneously doped layer.

公开(公告)号：US20220190140A1

公开(公告)日：2022-06-16

申请号：US17685780

申请日：2022-03-03

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/732

Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.

公开(公告)号：US20220149151A1

公开(公告)日：2022-05-12

申请号：US17584593

申请日：2022-01-26

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER ,  Gregory AVENIER

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/732

Abstract: A device including a transistor is fabricated by forming a first part of a first region of the transistor through the implantation of dopants through a first opening. The second region of the transistor is then formed in the first opening by epitaxy.

公开(公告)号：US20220130728A1

公开(公告)日：2022-04-28

申请号：US17568500

申请日：2022-01-04

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Pascal CHEVALIER ,  Alexis GAUTHIER ,  Gregory AVENIER

IPC: H01L21/8222 ,  H01L21/265 ,  H01L27/06 ,  H01L29/06 ,  H01L29/66 ,  H01L29/737 ,  H01L29/93

Abstract: At least one bipolar transistor and at least one variable capacitance diode are jointly produced by a method on a common substrate.

公开(公告)号：US20210273082A1

公开(公告)日：2021-09-02

申请号：US17175758

申请日：2021-02-15

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Edoardo BREZZA ,  A;exos GAUTHIER ,  Fabien DEPRAT ,  Pascal CHEVALIER

IPC: H01L29/737 ,  H01L21/8249 ,  H01L29/08 ,  H01L29/66 ,  H01L29/417

Abstract: A method of making a bipolar transistor includes forming a stack of a first, second, third and fourth insulating layers on a substrate. An opening is formed in the stack to reach the substrate. An epitaxial process forms the collector of the transistor on the substrate and selectively etches an annular opening in the third layer. The intrinsic part of the base is then formed by epitaxy on the collector, with the intrinsic part being separated from the third layer by the annular opening. The junction between the collector and the intrinsic part of the base is surrounded by the second layer. The emitter is formed on the intrinsic part and the third layer is removed. A selective deposition of a semiconductor layer on the second layer and in direct contact with the intrinsic part forms the extrinsic part of the base.

公开(公告)号：US20240162329A1

公开(公告)日：2024-05-16

申请号：US18387325

申请日：2023-11-06

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER ,  Edoardo BREZZA ,  Nicolas GUITARD

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/737

CPC classification number: H01L29/66242 ,  H01L29/0817 ,  H01L29/1004 ,  H01L29/6653 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/737

Abstract: An electronic device includes an insulating first layer covering a second layer made of a doped semiconductor material. A cavity is formed to cross through the first layer and reach the second layer. Insulating spacers are forming against lateral walls of the cavity. A first doped semiconductor region fills the cavity. The first doped semiconductor region has a doping concentration decreasing from the second layer.

公开(公告)号：US20230387208A1

公开(公告)日：2023-11-30

申请号：US18197945

申请日：2023-05-16

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Pascal CHEVALIER ,  Sebastien FREGONESE ,  Thomas ZIMMER

IPC: H01L29/10 ,  H01L29/732 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/1008 ,  H01L29/7322 ,  H01L29/0821 ,  H01L29/66272 ,  H01L29/0808 ,  H01L29/6625 ,  H01L29/6631

Abstract: A lateral bipolar transistor includes an emitter region doped with a first conductivity type, having a first width and a first average doping concentration; a collector region doped with the first conductivity type, having a second width greater than the first width of the emitter region and a second average doping concentration lower than the first average doping concentration ; and a base region positioned between the emitter and collector regions. The emitter, collector and base regions are arranged in a silicon layer on an insulator layer on a substrate. A substrate region that is deprived of the silicon and insulator layers is positioned on a side of the collector region. A bias circuit is coupled, and configured to deliver, to the substrate region a bias voltage. This bias voltage is controlled to modulate an electrostatic doping of the collector region.