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公开(公告)号：US20200014387A1
公开(公告)日：2020-01-09
申请号：US16503960
申请日：2019-07-05
Applicant: STMicroelectronics International N.V.
Inventor： Atul DWIVEDI , Paras GARG , Kallol CHATTERJEE
IPC: H03K19/0185 , G01R31/317
Abstract: A low-voltage-differential-signaling (LVDS) fault detector includes first and second LVDS lines, and a window comparator provides a first output indicating whether a difference between voltages at the first and second LVDS lines is greater than a threshold voltage, and a second output indicating whether a difference between the voltages at the second and first LVDS lines is greater than the threshold voltage. A charge circuit charges a capacitive node when either the first or second output is at a logic low, and discharges the capacitive node when neither the first nor second output is at a logic low. A Schmitt trigger generates a fault flag if charge on the capacitive node falls to a threshold.
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2.发明申请公开(公告)号：US20250013257A1
公开(公告)日：2025-01-09
申请号：US18750152
申请日：2024-06-21
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Atul DWIVEDI
Abstract: An integrated circuit comprises a current source, a plurality of transistors arranged in parallel, a plurality of resistors, a plurality of switches, switch control circuitry, and measurement circuitry. Each resistor is coupled with the emitter of a respective transistor. Each switch selectively couples the current source to a respective resistor such that a bias current flows from the current source to the emitter of a respective transistor when a respective switch is closed. The measurement circuitry is coupled to the first transistor between its emitter and a respective resistor. The measurement circuitry is configured to separately measure a base-emitter voltage (VBE1) of the first transistor when all of the switches are closed and a base-emitter voltage (VBE2) of the first transistor when only the switch associated with the first transistor is closed and to determine a ΔVBE by calculating a difference between VBE2 and VBE 1.
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公开(公告)号：US20230140251A1
公开(公告)日：2023-05-04
申请号：US17965282
申请日：2022-10-13
Applicant: STMicroelectronics International N.V.
Inventor： Atul DWIVEDI
Abstract: A temperature sensing circuit includes a current generation circuit generating an initial current proportional to absolute temperature (Iptat), and a voltage generation circuit configured to mirror Iptat using an adjustable current source to produce a scaled current and to source the scaled current to a first terminal of a resistor to produce a reference voltage at the first terminal. A second terminal of the resistor has a voltage complementary to absolute temperature (Vctat) applied thereto. An analog-to-digital converter (ADC) has a reference input receiving the reference voltage, and a data input receiving Vctat or an externally sourced voltage. The ADC generates an output code indicative of a ratio between: a) either Vctat or the externally sourced voltage, and b) the reference voltage. A digital circuit determines a temperature readout from the output code and calibrates the reference voltage and the temperature readout determination based upon the output code.
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Patent Agency Ranking
公开(公告)号：US20240175762A1
公开(公告)日：2024-05-30
申请号：US18432943
申请日：2024-02-05
Applicant: STMicroelectronics International N.V.
Inventor： Atul DWIVEDI , Pijush Kanti PANJA
CPC classification number: G01K7/00 , H03K17/60 , G01K2219/00
Abstract: A method includes generating a voltage proportional to absolute temperature, generating an uncorrected voltage complementary to absolute temperature, and generating a correction voltage. The method further includes selectively sampling the voltage proportional to absolute temperature, the uncorrected voltage complementary to absolute temperature, and the correction voltage, providing those sampled voltages to inputs of an integrator, and then quantizing outputs of the integrator to produce a bitstream. The method continues with causing the integrator to integrate the voltage proportional to absolute temperature or causing the integrator to add the correction voltage to the uncorrected voltage complementary to absolute temperature to produce a corrected voltage complementary to absolute temperature and then integrate the corrected voltage complementary to absolute temperature, depending upon a most recent bit of the bitstream. The bitstream is filtered and decimated to produce a voltage indicative of a temperature of a chip on which the method is performed.
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公开(公告)号：US20210239540A1
公开(公告)日：2021-08-05
申请号：US17136240
申请日：2020-12-29
Applicant: STMicroelectronics International N.V.
Inventor： Atul DWIVEDI , Pijush Kanti PANJA
Abstract: Circuitry generates base-to-emitter voltages (Vbe1, Vbe2) of two BJTs biased at different current densities, a base-to-emitter voltage (Vbe) of a BJT biased so Vbe is complementary to absolute temperature and has a curved non-linearity across temperature, and base-to-emitter voltages (Vbe1_c, Vbe2_c) of two BJTs biased by a temperature independent constant current and a current proportional to absolute temperature so Vbe2_c−Vbe1_c has the same but opposite curved non-linearity across temperature as Vbe. A sampling circuit samples these voltages and provides them to inputs of a loop filter. Filter outputs are quantized to produce a bitstream. The sampling circuit: when the received bit of the bitstream is zero, causes integration of Vbe1−Vbe2 to produce a voltage proportional to absolute temperature (αΔVbe); and when the received bit of the bitstream is one, causes integration of Vbe2_c−Vbe_Vbe1_c to produce a negative voltage complementary to absolute temperature −Vbe_c without non-linearity across temperature.
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公开(公告)号：US20250015795A1
公开(公告)日：2025-01-09
申请号：US18750277
申请日：2024-06-21
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Atul DWIVEDI
Abstract: An integrated circuit comprises a current source, a plurality of parallel transistors, a plurality of switches, switch control circuitry, and measurement circuitry. Each switch selectively couples the current source to a corresponding transistor. The switch control circuitry is configured to, at different times, cause all the switches to close and, separately for each transistor, cause the switch associated with each transistor to close while causing all other switches to open. The measurement circuitry is configured to measure, separately for each of the transistors, a base-emitter voltage (VBE) when all the switches are closed and a VBE when only the switch associated with each transistor is closed, determine a ΔVBE for each of the plurality of transistors by calculating a difference between the VBE when only the switch associated with each transistor is closed and the VBE when all the switches are closed, and calculate an average of all the ΔVBEs.
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公开(公告)号：US20220196485A1
公开(公告)日：2022-06-23
申请号：US17521123
申请日：2021-11-08
Applicant: STMicroelectronics International N.V.
Inventor： Pijush Kanti PANJA , Kallol CHATTERJEE , Atul DWIVEDI
Abstract: A temperature sensing circuit a switched capacitor circuit selectively samples ΔVbe and Vbe voltages and provides the sampled voltages to inputs of an integrator. A quantization circuit quantizes outputs of the integrator to produce a bitstream. When a most recent bit of the bitstream is a logic zero, operation includes sampling and integration of ΔVbe a first given number of times to produce a voltage proportional to absolute temperature. When the most recent bit of the bitstream is a logic one, operation includes cause sampling and integration of Vbe a second given number of times to produce a voltage complementary to absolute temperature. A low pass filter and decimator filters and decimates the bitstream produced by the quantization circuit to produce a signal indicative of a temperature of a chip into which the temperature sensing circuit is placed.
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8.发明申请公开(公告)号：US20190158085A1
公开(公告)日：2019-05-23
申请号：US15821387
申请日：2017-11-22
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Saiyid Mohammad Irshad RIZVI , Atul DWIVEDI
IPC: H03K17/687 , G05F3/24 , H03K19/0175 , G06F13/42
Abstract: One or more embodiments are directed to inter-integrated circuit (I2C) transmitters, receivers, and devices that utilize a stable reference voltage for driving a pre-driver of the transmitter and for driving a first input stage of the receiver. One embodiment is directed to a device A device that includes an inter-integrated circuit (I2C) transmitter and an I2C receiver. The I2C transmitter includes a driver coupled to an I2C data line, and a pre-driver coupled to a variable first supply voltage, a second supply voltage, and a reference voltage. The pre-driver is configured to output a control signal to a control terminal of the driver. The I2C receiver includes a first stage coupled to the I2C data line, the variable first supply voltage, the second supply voltage, and the reference voltage.
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