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公开(公告)号:US10686361B2
公开(公告)日:2020-06-16
申请号:US16355649
申请日:2019-03-15
发明人: Alberto Iorio , Maurizio Foresta
摘要: Various embodiments provide a resonant converter that includes a synchronous rectifier driver. The synchronous rectifier driver reduces voltage spikes on drains of transistors within the resonant converter by placing an active clamp between the drains of the transistors and an output terminal of the resonant converter. The active clamp reduces the voltage spikes by sinking current at the drains of the transistors to an output capacitor. By sinking the current to the output terminal, power loss is minimized and efficiency of the resonant converter is improved.
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2.
公开(公告)号:US20180212524A1
公开(公告)日:2018-07-26
申请号:US15925456
申请日:2018-03-19
发明人: Alberto Iorio , Maurizio Foresta
IPC分类号: H02M3/335 , H03K17/687 , H02M1/08 , H03K3/012
CPC分类号: H02M3/33523 , H02M1/08 , H02M3/335 , H02M3/33592 , H03K3/012 , H03K17/163 , H03K17/687 , Y02B70/1433 , Y02B70/1475
摘要: A driver includes a high-side driver transistor coupled between supply voltage and the gate drive nodes and provides a first charge current to a high side gate node of the high-side driver transistor until the gate drive node reaches a first gate drive threshold. Then a second charge current is provided to the high side gate node that is less than the first charge current. The gate drive node is limited to a first clamped threshold for a delay time. A gate drive current rise signal sets the value of the second charge current that charges the high side gate node and after the delay time the gate drive voltage is limited to a second clamped threshold greater than the first clamped threshold but less than the supply voltage. A gate drive programmable control signal sets the value of the second clamped threshold.
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公开(公告)号:US11817791B2
公开(公告)日:2023-11-14
申请号:US17490793
申请日:2021-09-30
发明人: Alberto Iorio , Maurizio Foresta , Emilio Volpi , Jan Novotny
CPC分类号: H02M3/33592 , H02M1/0058 , H02M3/01 , H02M1/08
摘要: A synchronous rectifier driver circuit is configured to drive a synchronous rectifier FET and includes a first terminal configured to be connected to a source terminal of the synchronous rectifier FET. A second terminal is configured to be connected to a drain terminal of the synchronous rectifier FET, and a third terminal is configured to be connected to a gate terminal of the synchronous rectifier FET. The synchronous rectifier driver circuit is configured to measure the voltage between the second terminal and the first terminal, and detect a switch-on instant in which the measured voltage reaches a first threshold value and a switch-off instant in which the measured voltage reaches a second threshold value. The synchronous rectifier driver circuit generates a drive signal between the third terminal and the first terminal as a function of the measured voltage.
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公开(公告)号:US20170085188A1
公开(公告)日:2017-03-23
申请号:US15066917
申请日:2016-03-10
发明人: Maurizio Foresta , Alberto Iorio
IPC分类号: H02M3/335 , H03K17/687 , H03K17/691 , H03K17/74
CPC分类号: H02M3/33546 , H02M1/08 , H02M3/33592 , H02M3/3378 , H02M2001/0058 , H03K17/063 , Y02B70/1433 , Y02B70/1475 , Y02B70/1491 , Y02P80/112
摘要: A driver circuit for synchronous rectifier electronic switches, such as SR MOSFETs in resonant converters controls a pair of synchronous rectifier electronic switches to apply thereto a drive voltage to switch the synchronous rectifier electronic switches on and off synchronously with a converter current. The driver circuit includes a programming module to produce a first signal indicative of the figure of merit of the synchronous rectifier electronic switches, and, optionally, a current sensing module to produce a second signal indicative of the output current of the synchronous rectifier electronic switches. An output module is included to generate a value for the drive voltage which is a function of the first signal indicative of the figure of merit and, optionally, of the second signal indicative of the output current of the synchronous rectifier electronic switches.
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5.
公开(公告)号:US20200336071A1
公开(公告)日:2020-10-22
申请号:US16387142
申请日:2019-04-17
发明人: Alberto Iorio , Emilio Volpi , Jeanpierre Vicquery
摘要: A method of controlling synchronous rectification transistors in a switching converter includes sensing a drain-to-source voltage across each synchronous rectification transistor each switching half-cycle of the switching converter. An average of the sensed drain-to-source voltage is calculated for each synchronous rectification transistor over N prior switching half-cycles. A load current transient in the switching converter is sensed based on the sensed drain-to-source voltage of each synchronous rectification transistor and the calculated average of the sensed drain-to-source voltage for each synchronous rectification transistor over the N prior switching half-cycles.
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公开(公告)号:US09960692B2
公开(公告)日:2018-05-01
申请号:US15282459
申请日:2016-09-30
发明人: Alberto Iorio , Maurizio Foresta
IPC分类号: H02M3/335 , H02M1/08 , H03K3/012 , H03K17/687 , H02M7/217
CPC分类号: H02M3/33523 , H02M1/08 , H02M3/335 , H02M3/33592 , H03K3/012 , H03K17/163 , H03K17/687
摘要: A driver includes a high-side driver transistor coupled between supply voltage and the gate drive nodes and provides a first charge current to a high side gate node of the high-side driver transistor until the gate drive node reaches a first gate drive threshold. Then a second charge current is provided to the high side gate node that is less than the first charge current. The gate drive node is limited to a first clamped threshold for a delay time. A gate drive current rise signal sets the value of the second charge current that charges the high side gate node and after the delay time the gate drive voltage is limited to a second clamped threshold greater than the first clamped threshold but less than the supply voltage. A gate drive programmable control signal sets the value of the second clamped threshold.
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公开(公告)号:US09356535B2
公开(公告)日:2016-05-31
申请号:US14458078
申请日:2014-08-12
发明人: Alberto Iorio , Giuseppe Scappatura , Alberto Bianco , Claudio Adragna , Silvio De Simone , Maurizio Foresta
CPC分类号: H02M7/217 , H02M3/33507 , H02M3/33592 , H02M2001/0058 , Y02B70/1475 , Y02B70/1491
摘要: A control device for a transistor of a switching converter rectifier generates a control signal of the transistor and includes a circuit to measure the conduction time of the body diode of the transistor cycle by cycle. When the conduction time is greater than a first threshold, the off time instant of the transistor is delayed by a first quantity in the next cycles, until the conduction time is less than the first threshold and greater than a second threshold. When the conduction time is between the first and second thresholds, the off time instant is delayed by a fixed second quantity in the next cycles until the conduction time is lower than the second threshold, with the second quantity less than the first quantity. When the conduction time is lower than the second threshold, the off time instant is advanced by the second quantity in the next cycle.
摘要翻译: 用于开关转换器整流器的晶体管的控制装置产生晶体管的控制信号,并且包括用于逐周期地测量晶体管体二极管的导通时间的电路。 当导通时间大于第一阈值时,晶体管的截止时间瞬间在下一个周期中延迟第一量,直到导通时间小于第一阈值并大于第二阈值。 当导通时间在第一阈值和第二阈值之间时,关闭时刻在下一个周期中延迟固定的第二数量,直到导通时间低于第二阈值,第二数量小于第一数量。 当导通时间低于第二阈值时,关闭时刻在下一个周期中提前第二个数量。
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8.
公开(公告)号:US10819245B1
公开(公告)日:2020-10-27
申请号:US16387142
申请日:2019-04-17
发明人: Alberto Iorio , Emilio Volpi , Jeanpierre Vicquery
摘要: A method of controlling synchronous rectification transistors in a switching converter includes sensing a drain-to-source voltage across each synchronous rectification transistor each switching half-cycle of the switching converter. An average of the sensed drain-to-source voltage is calculated for each synchronous rectification transistor over N prior switching half-cycles. A load current transient in the switching converter is sensed based on the sensed drain-to-source voltage of each synchronous rectification transistor and the calculated average of the sensed drain-to-source voltage for each synchronous rectification transistor over the N prior switching half-cycles.
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公开(公告)号:US10224824B2
公开(公告)日:2019-03-05
申请号:US15925456
申请日:2018-03-19
发明人: Alberto Iorio , Maurizio Foresta
摘要: A driver includes a high-side driver transistor coupled between supply voltage and the gate drive nodes and provides a first charge current to a high side gate node of the high-side driver transistor until the gate drive node reaches a first gate drive threshold. Then a second charge current is provided to the high side gate node that is less than the first charge current. The gate drive node is limited to a first clamped threshold for a delay time. A gate drive current rise signal sets the value of the second charge current that charges the high side gate node and after the delay time the gate drive voltage is limited to a second clamped threshold greater than the first clamped threshold but less than the supply voltage. A gate drive programmable control signal sets the value of the second clamped threshold.
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公开(公告)号:US20150049529A1
公开(公告)日:2015-02-19
申请号:US14458078
申请日:2014-08-12
发明人: Alberto Iorio , Giuseppe Scappatura , Alberto Bianco , Claudio Adragna , Silvio De Simone , Maurizio Foresta
CPC分类号: H02M7/217 , H02M3/33507 , H02M3/33592 , H02M2001/0058 , Y02B70/1475 , Y02B70/1491
摘要: A control device for a transistor of a switching converter rectifier generates a control signal of the transistor and comprises a circuit to measure the conduction time of the body diode of the transistor cycle by cycle. When the conduction time is greater than a first threshold, the off time instant of the transistor is delayed by a first quantity in the next cycles, until the conduction time is less than the first threshold and greater than a second threshold. When the conduction time is between the first and second thresholds, the off time instant is delayed by a fixed second quantity in the next cycles until the conduction time is lower than the second threshold, with the second quantity less than the first quantity. When the conduction time is lower than the second threshold, the off time instant is advanced by the second quantity in the next cycle.
摘要翻译: 用于开关转换器整流器的晶体管的控制装置产生晶体管的控制信号,并且包括用于逐周期地测量晶体管体二极管的导通时间的电路。 当导通时间大于第一阈值时,晶体管的截止时间瞬间在下一个周期中延迟第一量,直到导通时间小于第一阈值并大于第二阈值。 当导通时间在第一阈值和第二阈值之间时,关闭时刻在下一个周期中延迟固定的第二数量,直到导通时间低于第二阈值,第二数量小于第一数量。 当导通时间低于第二阈值时,关闭时刻在下一个周期中提前第二个数量。
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