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1.
公开(公告)号:US09520435B2
公开(公告)日:2016-12-13
申请号:US14840665
申请日:2015-08-31
Applicant: STMicroelectronics SA , STMicroelectronics (Crolles 2) SAS
Inventor: Nayera Ahmed , Michel Marty
IPC: H01L31/18 , H01L27/146
CPC classification number: H01L27/14636 , H01L27/1462 , H01L27/1463 , H01L27/14632 , H01L27/1464 , H01L27/14683 , H01L27/14687 , H01L27/14689
Abstract: An image sensor including a semiconductor layer; a stack of insulating layers resting on the back side of the semiconductor layer; a conductive layer portion extending along part of the height of the stack and flush with the exposed surface of the stack; laterally-insulated conductive fingers extending through the semiconductor layer from its front side and penetrating into said layer portion; laterally-insulated conductive walls separating pixel areas, these walls extending through the semiconductor layer from its front side and having a lower height than the fingers; and an interconnection structure resting on the front side of the semiconductor layer and including vias in contact with the fingers.
Abstract translation: 包括半导体层的图像传感器; 沉积在半导体层的背面上的一叠绝缘层; 导电层部分,其沿所述堆叠的高度的一部分延伸并与所述堆叠的暴露表面齐平; 横向绝缘的导电指状物从其前侧延伸穿过半导体层并且穿透到所述层部分中; 分隔像素区域的横向绝缘导电壁,这些壁从其前侧延伸穿过半导体层并且具有比手指低的高度; 以及搁置在半导体层的前侧上并且包括与手指接触的通孔的互连结构。
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2.
公开(公告)号:US20160172404A1
公开(公告)日:2016-06-16
申请号:US14840665
申请日:2015-08-31
Applicant: STMICROELECTRONICS SA , STMICROELECTRONICS (Crolles 2) SAS
Inventor: Nayera Ahmed , Michel Marty
IPC: H01L27/146
CPC classification number: H01L27/14636 , H01L27/1462 , H01L27/1463 , H01L27/14632 , H01L27/1464 , H01L27/14683 , H01L27/14687 , H01L27/14689
Abstract: An image sensor including a semiconductor layer; a stack of insulating layers resting on the back side of the semiconductor layer; a conductive layer portion extending along part of the height of the stack and flush with the exposed surface of the stack; laterally-insulated conductive fingers extending through the semiconductor layer from its front side and penetrating into said layer portion; laterally-insulated conductive walls separating pixel areas, these walls extending through the semiconductor layer from its front side and having a lower height than the fingers; and an interconnection structure resting on the front side of the semiconductor layer and including vias in contact with the fingers.
Abstract translation: 包括半导体层的图像传感器; 沉积在半导体层的背面上的一叠绝缘层; 导电层部分,其沿所述堆叠的高度的一部分延伸并与所述堆叠的暴露表面齐平; 横向绝缘的导电指状物从其前侧延伸穿过半导体层并且穿透到所述层部分中; 分隔像素区域的横向绝缘导电壁,这些壁从其前侧延伸穿过半导体层并且具有比手指低的高度; 以及搁置在半导体层的前侧上并且包括与手指接触的通孔的互连结构。
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公开(公告)号:US20160104730A1
公开(公告)日:2016-04-14
申请号:US14973344
申请日:2015-12-17
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Nayera Ahmed , François Roy
IPC: H01L27/146
CPC classification number: H01L27/1463 , H01L27/14643 , H01L27/14685 , H01L27/14689 , H01L27/14698
Abstract: A structure of insulation between photodiodes formed in a doped semiconductor layer of a first conductivity type extending on a doped semiconductor substrate of the second conductivity type, the insulating structure including a trench crossing the semiconductor layer, the trench walls being coated with an insulating layer, the trench being filled with a conductive material and being surrounded with a P-doped area, more heavily doped than the semiconductor layer.
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公开(公告)号:US09419039B2
公开(公告)日:2016-08-16
申请号:US14644795
申请日:2015-03-11
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Nayera Ahmed , Francois Roy
IPC: H01L27/146
CPC classification number: H01L27/1463 , H01L27/14643 , H01L27/14685 , H01L27/14689 , H01L27/14698
Abstract: A structure of insulation between photodiodes formed in a doped semiconductor layer of a first conductivity type extending on a doped semiconductor substrate of the second conductivity type, the insulating structure including a trench crossing the semiconductor layer, the trench walls being coated with an insulating layer, the trench being filled with a conductive material and being surrounded with a P-doped area, more heavily doped than the semiconductor layer.
Abstract translation: 在第二导电类型的掺杂半导体衬底上延伸的第一导电类型的掺杂半导体层中形成的光电二极管之间的绝缘结构,所述绝缘结构包括与半导体层交叉的沟槽,所述沟壁涂覆有绝缘层, 该沟槽被一个导电材料填充并且被比该半导体层更重掺杂的P掺杂区包围。
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公开(公告)号:US09825080B2
公开(公告)日:2017-11-21
申请号:US14973344
申请日:2015-12-17
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Nayera Ahmed , François Roy
IPC: H01L27/146
CPC classification number: H01L27/1463 , H01L27/14643 , H01L27/14685 , H01L27/14689 , H01L27/14698
Abstract: A structure of insulation between photodiodes formed in a doped semiconductor layer of a first conductivity type extending on a doped semiconductor substrate of the second conductivity type, the insulating structure including a trench crossing the semiconductor layer, the trench walls being coated with an insulating layer, the trench being filled with a conductive material and being surrounded with a P-doped area, more heavily doped than the semiconductor layer.
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公开(公告)号:US09437674B2
公开(公告)日:2016-09-06
申请号:US14660601
申请日:2015-03-17
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Nayera Ahmed , François Roy
IPC: H01L29/06 , H01L21/762 , H01L21/763
CPC classification number: H01L29/0649 , H01L21/76202 , H01L21/76205 , H01L21/76224 , H01L21/76227 , H01L21/76229 , H01L21/763
Abstract: A method of manufacturing an insulating trench including the successive steps of: a) forming, on a semiconductor substrate, a first masking structure including a layer of a first selectively-etchable material and etching a trench into the substrate; b) forming an insulating coating on the trench walls and filling the trench with doped polysilicon; c) forming a silicon oxide plug penetrating into the trench substantially all the way to the upper surface of the substrate and protruding above the upper surface of the substrate; and d) removing the layer of the first material.
Abstract translation: 一种制造绝缘沟槽的方法,包括以下连续步骤:a)在半导体衬底上形成包括第一可选蚀刻材料层的第一掩模结构,并将沟槽蚀刻到衬底中; b)在沟槽壁上形成绝缘涂层并用掺杂多晶硅填充沟槽; c)形成贯穿所述沟槽的氧化硅插塞,其基本上一直延伸到所述衬底的上表面并突出到所述衬底的上表面上方; 和d)去除第一材料的层。
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公开(公告)号:US20150295030A1
公开(公告)日:2015-10-15
申请号:US14660601
申请日:2015-03-17
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Nayera Ahmed , François Roy
IPC: H01L29/06 , H01L21/762
CPC classification number: H01L29/0649 , H01L21/76202 , H01L21/76205 , H01L21/76224 , H01L21/76227 , H01L21/76229 , H01L21/763
Abstract: A method of manufacturing an insulating trench including the successive steps of: a) forming, on a semiconductor substrate, a first masking structure including a layer of a first selectively-etchable material and etching a trench into the substrate; b) forming an insulating coating on the trench walls and filling the trench with doped polysilicon; c) forming a silicon oxide plug penetrating into the trench substantially all the way to the upper surface of the substrate and protruding above the upper surface of the substrate; and d) removing the layer of the first material.
Abstract translation: 一种制造绝缘沟槽的方法,包括以下连续步骤:a)在半导体衬底上形成包括第一可选蚀刻材料层的第一掩模结构,并将沟槽蚀刻到衬底中; b)在沟槽壁上形成绝缘涂层并用掺杂多晶硅填充沟槽; c)形成贯穿所述沟槽的氧化硅插塞,其基本上一直延伸到所述衬底的上表面并突出到所述衬底的上表面上方; 和d)去除第一材料的层。
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公开(公告)号:US20150279878A1
公开(公告)日:2015-10-01
申请号:US14644795
申请日:2015-03-11
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Nayera Ahmed , Francois Roy
IPC: H01L27/146
CPC classification number: H01L27/1463 , H01L27/14643 , H01L27/14685 , H01L27/14689 , H01L27/14698
Abstract: A structure of insulation between photodiodes formed in a doped semiconductor layer of a first conductivity type extending on a doped semiconductor substrate of the second conductivity type, the insulating structure including a trench crossing the semiconductor layer, the trench walls being coated with an insulating layer, the trench being filled with a conductive material and being surrounded with a P-doped area, more heavily doped than the semiconductor layer.
Abstract translation: 在第二导电类型的掺杂半导体衬底上延伸的第一导电类型的掺杂半导体层中形成的光电二极管之间的绝缘结构,所述绝缘结构包括与半导体层交叉的沟槽,所述沟壁涂覆有绝缘层, 该沟槽被一个导电材料填充并且被比该半导体层更重掺杂的P掺杂区包围。
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