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    Vertical gate transistor and pixel structure comprising such a transistor
    1.
    发明授权
    Vertical gate transistor and pixel structure comprising such a transistor 有权
    垂直栅晶体管和包括这种晶体管的像素结构

    公开(公告)号：US09209211B2

    公开(公告)日：2015-12-08

    申请号：US14660847

    申请日：2015-03-17

    Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

    Inventor： Jean-Robert Manouvrier ,  Pascal Fonteneau ,  Xavier Montagner

    IPC: H01L27/146 ,  H01L29/423

    CPC classification number: H01L27/14614 ,  H01L27/14607 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14687 ,  H01L27/14689 ,  H01L29/4236

    Abstract: The present disclosure relates to a photodiode comprising: a P-conductivity type substrate region, an electric charge collecting region for collecting electric charges appearing when a rear face of the substrate region receives light, the collecting region comprising an N-conductivity type region formed deep in the substrate region, an N-conductivity type read region formed in the substrate region, and an isolated transfer gate, formed in the substrate region in a deep isolating trench extending opposite a lateral face of the N-conductivity type region, next to the read region, and arranged for receiving a gate voltage to transfer electric charges stored in the collecting region toward the read region.

    Abstract translation: 本发明涉及一种光电二极管，包括：P导电型衬底区域，用于收集当衬底区域的后表面接收光时出现的电荷的电荷收集区域，所述收集区域包括形成深的N导电类型区域 在基板区域中，形成在基板区域中的N导电型读取区域和隔离的转移栅极，形成在与N导电型区域的侧面相反延伸的深隔离沟槽中的基板区域中， 并且被布置为接收栅极电压以将存储在收集区域中的电荷转移到读取区域。

    Back-side illuminated image sensor
    7.
    发明授权
    Back-side illuminated image sensor 有权

    公开(公告)号：US12199131B2

    公开(公告)日：2025-01-14

    申请号：US17855521

    申请日：2022-06-30

    Applicant: STMicroelectronics (Crolles 2) SAS

    Inventor： Laurent Gay ,  Frederic Lalanne ,  Yann Henrion ,  Francois Guyader ,  Pascal Fonteneau ,  Aurelien Seignard

    IPC: H01L27/146

    Abstract: Image sensors and methods of manufacturing image sensors are provided. One such method includes forming a structure that includes a semiconductor layer extending from a front side to a back side, and a capacitive insulation wall extending through the semiconductor layer. The capacitive insulation wall includes first and second insulating walls separated by a region of a conductor or a semiconductor material. Portions of the semiconductor layer and the region of the conductor or semiconductor material are selectively etched, and the first and second insulating walls have portions protruding outwardly beyond a back side of the semiconductor layer and of the region of the conductor or semiconductor material. A dielectric passivation layer is deposited on the back side of the structure, and portions of the dielectric passivation layer are locally removed on a back side of the protruding portions of the first and second insulating walls.

    Back-side illuminated image sensor
    8.
    发明授权
    Back-side illuminated image sensor 有权

    公开(公告)号：US11031433B2

    公开(公告)日：2021-06-08

    申请号：US16270989

    申请日：2019-02-08

    Applicant: STMicroelectronics (Crolles 2) SAS

    Inventor： Frederic Lalanne ,  Laurent Gay ,  Pascal Fonteneau ,  Yann Henrion ,  Francois Guyader

    IPC: H01L27/146 ,  H01L21/02 ,  H01L21/306

    Abstract: Image sensors and methods of manufacturing image sensors are provided herein. In an embodiment, a method of manufacturing an image sensor includes forming a structure having a front side and a back side. The structure includes a semiconductor layer extending between the front side and the back side of the structure, and a capacitive insulation wall extending through the semiconductor layer between the front side and the back side of the structure. The capacitive insulation wall includes first and second insulating walls separated by a region of a conductive or semiconductor material. The method further includes selectively etching, from the back side of the structure, portions of the semiconductor layer and the region of conductive or semiconductor material, while retaining adjacent portions of the first and second insulating walls.

    Back-side illuminated image sensor
    9.
    发明授权
    Back-side illuminated image sensor 有权

    公开(公告)号：US11610933B2

    公开(公告)日：2023-03-21

    申请号：US17327364

    申请日：2021-05-21

    Applicant: STMicroelectronics (Crolles 2) SAS

    Inventor： Frederic Lalanne ,  Laurent Gay ,  Pascal Fonteneau ,  Yann Henrion ,  Francois Guyader

    IPC: H01L27/146 ,  H01L21/768 ,  H01L21/02 ,  H01L21/306

    Abstract: Image sensors and methods of manufacturing image sensors are provided herein. In an embodiment, a method of manufacturing an image sensor includes forming a structure having a front side and a back side. The structure includes a semiconductor layer extending between the front side and the back side of the structure, and a capacitive insulation wall extending through the semiconductor layer between the front side and the back side of the structure. The capacitive insulation wall includes first and second insulating walls separated by a region of a conductive or semiconductor material. The method further includes selectively etching, from the back side of the structure, portions of the semiconductor layer and the region of conductive or semiconductor material, while retaining adjacent portions of the first and second insulating walls.

    ON-SOI integrated circuit comprising a thyristor (SCR) for protection against electrostatic discharges
    10.
    发明申请
    ON-SOI integrated circuit comprising a thyristor (SCR) for protection against electrostatic discharges 有权
    ON-SOI集成电路包括用于防止静电放电的晶闸管（SCR）

    公开(公告)号：US20140015052A1

    公开(公告)日：2014-01-16

    申请号：US13932371

    申请日：2013-07-01

    Applicant: STMicroelectronics SA ,  Commissariat a l'energie atomique et aux energies alternatives

    Inventor： Claire Fenouillet-Beranger ,  Pascal Fonteneau

    IPC: H01L27/12

    CPC classification number: H01L27/1203 ,  H01L27/0262 ,  H01L27/0296 ,  H01L27/0688 ,  H01L27/1207

    Abstract: An integrated circuit includes an UTBOX insulating layer under and plumb with first and second electronic components, and corresponding ground planes and oppositely-doped wells made plumb with them. The wells contact with corresponding ground planes. A pair of oppositely doped bias electrodes, suitable for connecting corresponding bias voltages, contacts respective wells and ground planes. A third electrode contacts the first well. A first trench isolates one bias electrode from the third electrode and extends through the layer and into the first well. A second trench isolates the first bias electrode from one component. This trench has an extent that falls short of reaching an interface between the first ground plane and the first well.

    Abstract translation: 集成电路包括在第一和第二电子部件下面并且铅垂的UTBOX绝缘层，以及相应的接地平面和与其相反的相对掺杂的阱。 油井与相应的地面接触。 一对相对掺杂的偏置电极适于连接相应的偏置电压，接触相应的阱和接地层。 第三电极接触第一阱。 第一沟槽将一个偏置电极与第三电极隔离并延伸穿过该层并进入第一阱。 第二沟槽将第一偏置电极与一个部件隔离。 该沟槽的程度不足以达到第一接地层与第一井之间的界面。

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