公开(公告)号：US11315961B2

公开(公告)日：2022-04-26

申请号：US16486224

申请日：2018-03-15

申请人： Sadanori Arae ,  Yuichi Ando ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Naoyuki Ueda ,  Ryoichi Saotome ,  Minehide Kusayanagi

发明人： Sadanori Arae ,  Yuichi Ando ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Naoyuki Ueda ,  Ryoichi Saotome ,  Minehide Kusayanagi

IPC分类号： H01L27/12 ,  H01L29/417

摘要： (Object) To miniaturize a field-effect transistor. (Means of Achieving the Object) A field-effect transistor includes a semiconductor film formed on a base, a gate insulating film formed on a part of the semiconductor film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode formed in contact with the semiconductor film, wherein a thickness of the source electrode and the drain electrode is smaller than a thickness of the gate insulating film, and the gate insulating film includes a region that is not in contact with the source electrode or the drain electrode.

公开(公告)号：US10204799B2

公开(公告)日：2019-02-12

申请号：US15376895

申请日：2016-12-13

申请人： Minehide Kusayanagi ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae

发明人： Minehide Kusayanagi ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae

IPC分类号： H01L21/44 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66 ,  H01L21/477 ,  H01L29/786

摘要： A method for manufacturing a field-effect transistor includes forming an active layer of an oxide semiconductor, forming a conducting film to cover the active layer, patterning the conducting film through an etching process using an etchant to form a source electrode and a drain electrode, and performing, at least before the patterning the conducting film, a treatment on the active layer so that an etching rate of the active layer is less than an etching rate of the conducting film.

公开(公告)号：US10748784B2

公开(公告)日：2020-08-18

申请号：US16047374

申请日：2018-07-27

申请人： Sadanori Arae ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Ryoichi Saotome ,  Minehide Kusayanagi

发明人： Sadanori Arae ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Ryoichi Saotome ,  Minehide Kusayanagi

IPC分类号： H01L29/786 ,  H01L29/66 ,  H01L29/51 ,  H01L29/49 ,  H01L27/12 ,  H01L21/02 ,  H01L21/441 ,  H01L21/4763 ,  H01L29/417 ,  H01L21/3213 ,  H01L29/45 ,  H01L29/423 ,  G02F1/1368 ,  H01L27/32

摘要： A method is provided for manufacturing a field effect transistor that includes a gate insulating layer and an electrode including a first conductive film and a second conductive film successively laminated on a predetermined surface of the gate insulating layer. The method includes forming an oxide film including element A, which is an alkaline earth metal, and element B, which is at least one of Ga, Sc, Y and a lanthanide, as the gate insulating layer; forming a first conductive film that dissolves in an organic alkaline solution on the oxide film; forming a second conductive film on the first conductive film; etching the second conductive film with an etching solution having a higher etch rate for the second conductive film as compared with that for the first conductive film; and etching the first conductive film with the organic alkaline solution using the second conductive film as a mask.

公开(公告)号：US10236304B2

公开(公告)日：2019-03-19

申请号：US15369678

申请日：2016-12-05

申请人： Sadanori Arae ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Ryoichi Saotome ,  Minehide Kusayanagi

发明人： Sadanori Arae ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Ryoichi Saotome ,  Minehide Kusayanagi

IPC分类号： H01L27/00 ,  H01L27/12 ,  H01L29/786

摘要： A gas barrier laminate includes a substrate and a barrier layer formed on at least one of faces of the substrate. The barrier layer includes composite oxide including silicon and alkaline-earth metal.

公开(公告)号：US20170170333A1

公开(公告)日：2017-06-15

申请号：US15370253

申请日：2016-12-06

申请人： Shinji MATSUMOTO ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae ,  Minehide Kusayanagi

发明人： Shinji MATSUMOTO ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae ,  Minehide Kusayanagi

IPC分类号： H01L29/786 ,  H01L27/12 ,  G09G5/10 ,  H01L29/66

CPC分类号： H01L29/78696 ,  G09G3/3233 ,  G09G3/344 ,  G09G3/3648 ,  G09G3/38 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/7869 ,  H01L2251/533

摘要： A semiconductor device includes a base; a gate electrode to which a gate voltage is applied; a source electrode and a drain electrode through which an electric current is generated according to the gate voltage being applied to the gate electrode; a semiconductor layer made of an oxide semiconductor; and a gate insulating layer inserted between the gate electrode and the semiconductor layer. The semiconductor layer includes a channel-forming region and a non-channel-forming region; the channel-forming region is in contact with the source electrode and the drain electrode, and the non-channel-forming region is in contact with the source electrode and the drain electrode.

公开(公告)号：US10818770B2

公开(公告)日：2020-10-27

申请号：US16518265

申请日：2019-07-22

申请人： Minehide Kusayanagi ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae

发明人： Minehide Kusayanagi ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae

IPC分类号： H01L27/12 ,  H01L29/51 ,  H01L21/4757 ,  H01L21/4763 ,  H01L29/66 ,  H01L29/786

摘要： Method for producing field-effect transistor including source electrode and drain electrode, gate electrode, active layer, and gate insulating layer, the method including etching the gate insulating layer, wherein the gate insulating layer is metal oxide including A-element and at least one selected from B-element and C-element, the A-element is at least one selected from Sc, Y, Ln (lanthanoid), Sb, Bi, and Te, the B-element is at least one selected from Ga, Ti, Zr, and Hf, the C-element is at least one selected from Group 2 elements in periodic table, etching solution A is used when at least one selected from the source electrode and the drain electrode, the gate electrode, and the active layer is formed, and etching solution B that is etching solution having same type as the etching solution A is used when the gate insulating layer is etched.

公开(公告)号：US10586873B2

公开(公告)日：2020-03-10

申请号：US16131760

申请日：2018-09-14

申请人： Shinji Matsumoto ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae ,  Minehide Kusayanagi

发明人： Shinji Matsumoto ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae ,  Minehide Kusayanagi

IPC分类号： H01L21/00 ,  H01L21/16 ,  H01L29/786 ,  H01L21/02 ,  H01L27/12 ,  H01L29/04 ,  H01L29/24 ,  H01L51/00

摘要： A method for producing a field-effect transistor including first-oxide-layer and second-oxide-layer and forming front-channel or back-channel in region where the first-oxide-layer and the second-oxide-layer are adjacent to each other, the method including: forming second-precursor-layer, which is precursor of the second-oxide-layer, so as to be in contact with first-precursor-layer, which is precursor of the first-oxide-layer, and then converting the first-precursor-layer and the second-precursor-layer to the first-oxide-layer and the second-oxide-layer, respectively, the forming includes at least one of treatments (I) and (II) below: (I) treatment of: coating first-oxide-precursor-forming coating liquid that can form precursor of first oxide and contains solvent; and then removing the solvent to form the first-precursor-layer which is the precursor of the first-oxide-layer; and (II) treatment of: coating second-oxide-precursor-forming coating liquid that can form precursor of second oxide and contains solvent; and then removing the solvent to form the second-precursor-layer which is the precursor of the second-oxide-layer.

公开(公告)号：US10170635B2

公开(公告)日：2019-01-01

申请号：US15370253

申请日：2016-12-06

申请人： Shinji Matsumoto ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae ,  Minehide Kusayanagi

发明人： Shinji Matsumoto ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae ,  Minehide Kusayanagi

IPC分类号： H01L29/00 ,  H01L29/786 ,  H01L29/66 ,  H01L27/12 ,  H01L27/32 ,  G09G3/3233 ,  G09G3/34 ,  G09G3/36 ,  G09G3/38

摘要： A semiconductor device includes a base; a gate electrode to which a gate voltage is applied; a source electrode and a drain electrode through which an electric current is generated according to the gate voltage being applied to the gate electrode; a semiconductor layer made of an oxide semiconductor; and a gate insulating layer inserted between the gate electrode and the semiconductor layer. The semiconductor layer includes a channel-forming region and a non-channel-forming region; the channel-forming region is in contact with the source electrode and the drain electrode, and the non-channel-forming region is in contact with the source electrode and the drain electrode.

公开(公告)号：US10115828B2

公开(公告)日：2018-10-30

申请号：US15220588

申请日：2016-07-27

申请人： Yukiko Abe ,  Naoyuki Ueda ,  Yuki Nakamura ,  Shinji Matsumoto ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae ,  Minehide Kusayanagi

发明人： Yukiko Abe ,  Naoyuki Ueda ,  Yuki Nakamura ,  Shinji Matsumoto ,  Yuji Sone ,  Ryoichi Saotome ,  Sadanori Arae ,  Minehide Kusayanagi

IPC分类号： H01L21/336 ,  H01L21/768 ,  H01L29/24 ,  H01L29/45 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786 ,  H01L51/00 ,  H01L51/30 ,  G09G3/3225 ,  G09G3/34 ,  H01L29/40 ,  H01L29/417 ,  H01L27/12 ,  H01L27/32 ,  H01L21/02 ,  H01L51/05 ,  H01L51/10 ,  H01L27/28 ,  H01L29/66

摘要： A field-effect transistor including: a gate electrode; a source electrode and a drain electrode; an active layer disposed to be adjacent to the source electrode and the drain electrode and including a n-type oxide semiconductor; and a gate insulating layer disposed between the gate electrode and the active layer, wherein the n-type oxide semiconductor undergoes substitutional doping with at least one dopant selected from divalent, trivalent, tetravalent, pentavalent, hexavalent, heptavalent, and octavalent cations, valence of the dopant is greater than valence of a metal ion constituting the n-type oxide semiconductor, provided that the dopant is excluded from the metal ion, and the source electrode and the drain electrode include a material selected from Au, Pt, and Pd and alloys including at least any one of Au, Pt, and Pd, in at least contact regions of the source electrode and the drain electrode with the active layer.

公开(公告)号：US10008181B2

公开(公告)日：2018-06-26

申请号：US15452886

申请日：2017-03-08

申请人： Ryoichi Saotome ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Sadanori Arae ,  Minehide Kusayanagi

发明人： Ryoichi Saotome ,  Naoyuki Ueda ,  Yuki Nakamura ,  Yukiko Abe ,  Shinji Matsumoto ,  Yuji Sone ,  Sadanori Arae ,  Minehide Kusayanagi

IPC分类号： H01L27/12 ,  G09G5/10 ,  H01L27/32

CPC分类号： G09G5/10 ,  G09G3/20 ,  G09G2300/0426 ,  G09G2300/08 ,  G09G2320/0646 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/78693

摘要： A field-effect transistor including: a substrate; a passivation layer; a gate insulating layer, formed between the substrate and passivation layer; a source electrode and a drain electrode, formed to be in contact with the gate insulating layer; a semiconductor layer, formed at least between the source electrode and drain electrode and being in contact with the gate insulating layer, source electrode, and drain electrode; and a gate electrode, in contact with the gate insulating layer and facing the semiconductor layer via the gate insulating layer, wherein the passivation layer is formed of a single layer containing a paraelectric amorphous oxide containing a Group A element, an alkaline earth metal and a Group B element, at least one selected from Ga, Sc, Y, and lanthanoid, and the gate insulating layer contains at least one selected from oxides of Si, nitrides of Si, and oxynitrides of Si.