公开(公告)号：US07338904B2

公开(公告)日：2008-03-04

申请号：US10596177

申请日：2004-12-03

申请人： Sakae Koyata ,  Tadashi Denda ,  Masashi Norimoto ,  Kazushige Takaishi

发明人： Sakae Koyata ,  Tadashi Denda ,  Masashi Norimoto ,  Kazushige Takaishi

IPC分类号： H01L21/302

CPC分类号： H01L21/02024 ,  B24B37/04 ,  H01L21/02019 ,  H01L21/30604

摘要： A surface of a semiconductor wafer which has been lapped is ground. This removes a damage caused on the wafer surface during lapping, thereby increasing the flatness of the wafer surface. Next, the wafer is subjected to composite etching and the both surfaces are polished, i.e., subjected to mirror polishing while the wafer rear surface is slightly polished so as to obtain a single-side mirror surface wafer having a difference between the front and the rear surfaces. As compared to mere acid etching or alkali etching, it is possible to manufacture a single-side mirror surface wafer having a higher flatness.

摘要翻译： 研磨已经研磨的半导体晶片的表面。 这消除了在研磨期间在晶片表面上造成的损伤，从而增加了晶片表面的平坦度。 接下来，对晶片进行复合蚀刻，并且抛光两个表面，即，在晶片后表面稍微抛光的同时进行镜面抛光，以获得具有前后的差异的单面镜面晶片 表面。 与仅仅酸蚀刻或碱蚀刻相比，可以制造具有较高平坦度的单面镜面晶片。

公开(公告)号：US20070158308A1

公开(公告)日：2007-07-12

申请号：US10596177

申请日：2004-12-03

申请人： Sakae Koyata ,  Tadashi Denda ,  Masashi Norimoto ,  Kazushige Takaishi

发明人： Sakae Koyata ,  Tadashi Denda ,  Masashi Norimoto ,  Kazushige Takaishi

IPC分类号： B44C1/22 ,  C03C15/00 ,  H01L21/302

CPC分类号： H01L21/02024 ,  B24B37/04 ,  H01L21/02019 ,  H01L21/30604

摘要： A surface of a semiconductor wafer which has been lapped is ground. This removes a damage caused on the wafer surface during lapping, thereby increasing the flatness of the wafer surface. Next, the wafer is subjected to composite etching and the both surfaces are polished, i.e., subjected to mirror polishing while the wafer rear surface is slightly polished so as to obtain a single-side mirror surface wafer having a difference between the front and the rear surfaces. As compared to mere acid etching or alkali etching, it is possible to manufacture a single-side mirror surface wafer having a higher flatness.

摘要翻译： 研磨已经研磨的半导体晶片的表面。 这消除了在研磨期间在晶片表面上造成的损伤，从而增加了晶片表面的平坦度。 接下来，对晶片进行复合蚀刻，并且抛光两个表面，即，在晶片后表面稍微抛光的同时进行镜面抛光，以获得具有前后的差异的单面镜面晶片 表面。 与仅仅酸蚀刻或碱蚀刻相比，可以制造具有较高平坦度的单面镜面晶片。

公开(公告)号：US20050112893A1

公开(公告)日：2005-05-26

申请号：US10957030

申请日：2004-10-01

申请人： Sakae Koyata ,  Kazushige Takaishi ,  Tohru Taniguchi ,  Kazuo Fujimaki ,  Akihiro Kudo ,  Masashi Norimoto

发明人： Sakae Koyata ,  Kazushige Takaishi ,  Tohru Taniguchi ,  Kazuo Fujimaki ,  Akihiro Kudo ,  Masashi Norimoto

IPC分类号： H01L21/304 ,  B24B37/04 ,  H01L21/302 ,  H01L21/306 ,  H01L21/461

CPC分类号： C30B29/06 ,  B24B37/042 ,  C30B33/10 ,  H01L21/02019 ,  H01L21/30604 ,  H01L21/30608

摘要： Provided is an improved method for producing a silicon wafer whose surfaces exhibit precise flatness and minute surface roughness, and which allows one to visually discriminate between the front and rear surfaces, the method comprising a slicing step of slicing a single-crystal ingot into thin disc-like wafers, a chamfering step of chamfering the wafer, a lapping step for flattening the wafer, an etching step for removing processing distortions on the wafer surfaces, a mirror-polishing step for mirror-polishing the surface of the wafer, and a cleaning step for cleaning the wafer. The etching step further comprises a first acid-etching phase and a second alkali-etching phase, and a rear surface mild polishing step is introduced between the first and second etching phases in order to abrade part of roughness formed on the rear surface of the wafer as a result of the first etching phase.

摘要翻译： 提供了一种用于制造表面精确平坦度和微小表面粗糙度的硅晶片的改进方法，并且其允许在视觉上区分前表面和后表面，该方法包括将单晶锭切割成薄盘的切片步骤 用于使晶片倒角的研磨步骤，用于使晶片平坦化的研磨步骤，用于去除晶片表面上的加工变形的蚀刻步骤，用于镜面抛光晶片表面的镜面抛光步骤以及清洁 清洁晶圆的步骤。 蚀刻步骤还包括第一酸腐蚀相和第二碱蚀刻相，并且在第一和第二蚀刻相之间引入后表面温和的抛光步骤，以便研磨形成在晶片的后表面上的部分粗糙度 作为第一蚀刻阶段的结果。

公开(公告)号：US07226864B2

公开(公告)日：2007-06-05

申请号：US10957030

申请日：2004-10-01

申请人： Sakae Koyata ,  Kazushige Takaishi ,  Tohru Taniguchi ,  Kazuo Fujimaki ,  Akihiro Kudo ,  Masashi Norimoto

发明人： Sakae Koyata ,  Kazushige Takaishi ,  Tohru Taniguchi ,  Kazuo Fujimaki ,  Akihiro Kudo ,  Masashi Norimoto

IPC分类号： H01L21/461 ,  H01L21/302

CPC分类号： C30B29/06 ,  B24B37/042 ,  C30B33/10 ,  H01L21/02019 ,  H01L21/30604 ,  H01L21/30608

摘要： Provided is an improved method for producing a silicon wafer whose surfaces exhibit precise flatness and minute surface roughness, and which allows one to visually discriminate between the front and rear surfaces, the method comprising a slicing step of slicing a single-crystal ingot into thin disc-like wafers, a chamfering step of chamfering the wafer, a lapping step for flattening the wafer, an etching step for removing processing distortions on the wafer surfaces, a mirror-polishing step for mirror-polishing the surface of the wafer, and a cleaning step for cleaning the wafer. The etching step further comprises a first acid-etching phase and a second alkali-etching phase, and a rear surface mild polishing step is introduced between the first and second etching phases in order to abrade part of roughness formed on the rear surface of the wafer as a result of the first etching phase.

摘要翻译： 提供了一种用于制造表面精确平坦度和微小表面粗糙度的硅晶片的改进方法，并且其允许在视觉上区分前表面和后表面，该方法包括将单晶锭切割成薄盘的切片步骤 用于使晶片倒角的研磨步骤，用于使晶片平坦化的研磨步骤，用于去除晶片表面上的加工变形的蚀刻步骤，用于镜面抛光晶片表面的镜面抛光步骤以及清洁 清洁晶圆的步骤。 蚀刻步骤还包括第一酸腐蚀相和第二碱蚀刻相，并且在第一和第二蚀刻相之间引入后表面温和的抛光步骤，以便研磨形成在晶片的后表面上的部分粗糙度 作为第一蚀刻阶段的结果。

公开(公告)号：US20060194441A1

公开(公告)日：2006-08-31

申请号：US11067117

申请日：2005-02-25

申请人： Sakae Koyata ,  Kazushige Takaishi ,  Masashi Norimoto

发明人： Sakae Koyata ,  Kazushige Takaishi ,  Masashi Norimoto

IPC分类号： H01L21/302 ,  B44C1/22 ,  C23F1/00

CPC分类号： H01L21/30608 ,  H01L21/02019

摘要： The invention is improvement of a silicon wafer etching method of storing an acid etching solution and an alkali etching solution respectively in plural etching tanks, and immersing a silicon wafer having a work-degenerated layer, which has experienced a lapping process and then a cleaning process, in the acid etching solution and the alkali etching solution in order. Its characteristic configuration is in that an alkali etching process is performed after an acid etching process, the etching removal depth for acid etching is made to be equal to or larger than the etching removal depth for alkali etching, and the etching rate of acid etching is made to be 0.0075 μm/sec to 0.05 μm/sec in total of the obverse and the reverse of the silicon wafer.

摘要翻译： 本发明是改进在多个蚀刻槽中分别存储酸蚀刻溶液和碱蚀刻溶液的硅晶片蚀刻方法，以及经历了研磨过程然后进行清洗处理的具有工作退化层的硅晶片 ，在酸蚀刻溶液和碱蚀刻溶液中。 其特征在于，在酸蚀刻工序之后进行碱蚀刻处理，将酸蚀刻的蚀刻去除深度设定为等于或大于碱蚀刻的蚀刻去除深度，酸蚀刻的蚀刻速率为 相对于硅晶片的正面和反向总计为0.0075mum / sec至0.05mum / sec。