公开(公告)号：US20070262297A1

公开(公告)日：2007-11-15

申请号：US11432760

申请日：2006-05-10

申请人： Salvatore Leonardi ,  Claudia Caligiore ,  Guglielmo Fortunato ,  Luigi Mariucci ,  Stefano Cipolloni ,  Francesco Angelis

发明人： Salvatore Leonardi ,  Claudia Caligiore ,  Guglielmo Fortunato ,  Luigi Mariucci ,  Stefano Cipolloni ,  Francesco Angelis

IPC分类号： H01L29/08 ,  H01L35/24 ,  H01L51/00

CPC分类号： H01L51/0545 ,  H01L51/004 ,  H01L51/0533 ,  H01L51/105

摘要： An organic thin-film transistor device integrated on a substrate and comprising at least an organic active layer and metallic contact regions realized on an insulating layer. Advantageously the organic thin-film transistor device further comprises a thin buffer layer of polymethylmetacrylate or PMMA realized between the metallic contact regions and the organic active layer. A process for manufacturing an organic thin-film transistor device is also described.

摘要翻译： 一种集成在基板上并且至少包括在绝缘层上实现的有机活性层和金属接触区域的有机薄膜晶体管器件。 有利地，有机薄膜晶体管器件还包括在金属接触区域和有机活性层之间实现的聚甲基丙烯酸甲酯或PMMA的缓冲缓冲层。 还描述了制造有机薄膜晶体管器件的工艺。

公开(公告)号：US07674694B2

公开(公告)日：2010-03-09

申请号：US12031456

申请日：2008-02-14

申请人： Salvatore Leonardi ,  Salvatore Coffa ,  Claudia Caligiore ,  Guglielmo Fortunato ,  Luigi Mariucci ,  Massimo Cuscuna

发明人： Salvatore Leonardi ,  Salvatore Coffa ,  Claudia Caligiore ,  Guglielmo Fortunato ,  Luigi Mariucci ,  Massimo Cuscuna

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L29/78621 ,  H01L29/66757

摘要： A process for realizing TFT devices on a substrate comprises the steps of: forming on the substrate, in cascade, an amorphous silicon layer and a heavily doped amorphous silicon layer, forming a photolithographic mask on the heavily doped amorphous silicon layer provided with an opening, removing the heavily doped amorphous silicon layer through the opening for realizing opposite portions of the heavily doped amorphous silicon layer whose cross dimensions decrease as long as they depart from the amorphous silicon layer, removing the photolithographic mask, carrying out a diffusion and activation step of the dopant contained in the portions of the heavily doped amorphous silicon layer inside the amorphous silicon layer, for realizing source/drain regions of said TFT device.

摘要翻译： 用于在衬底上实现TFT器件的工艺包括以下步骤：级联地形成非晶硅层和重掺杂非晶硅层，在设置有开口的重掺杂非晶硅层上形成光刻掩模， 通过开口去除重掺杂的非晶硅层，用于实现重掺杂非晶硅层的相对部分，其横截面尺寸随着离开非晶硅层而减小，除去光刻掩模，进行扩散和激活步骤 包含在非晶硅层内部的重掺杂非晶硅层的部分中的掺杂物，用于实现所述TFT器件的源极/漏极区域。

公开(公告)号：US20080213961A1

公开(公告)日：2008-09-04

申请号：US12031456

申请日：2008-02-14

申请人： Salvatore Leonardi ,  Salvatore Coffa ,  Claudia Caligiore ,  Guglielmo Fortunato ,  Luigi Mariucci ,  Massimo Cuscuna

发明人： Salvatore Leonardi ,  Salvatore Coffa ,  Claudia Caligiore ,  Guglielmo Fortunato ,  Luigi Mariucci ,  Massimo Cuscuna

IPC分类号： H01L21/336 ,  H01L21/20

CPC分类号： H01L29/78621 ,  H01L29/66757

摘要： Process for realizing TFT devices on a substrate which comprises the steps of: forming on the substrate, in cascade, an amorphous silicon layer and a heavily doped amorphous silicon layer, forming a photolithographic mask on the heavily doped amorphous silicon layer provided with an opening, removing the heavily doped amorphous silicon layer through the opening for realizing opposite portions of the heavily doped amorphous silicon layer whose cross dimensions decrease as long as they depart from the amorphous silicon layer, removing the photolithographic mask, carrying out a diffusion and activation step of the dopant contained in the portions of the heavily doped amorphous silicon layer inside the amorphous silicon layer, for realizing source/drain regions of said TFT device.

摘要翻译： 一种用于在衬底上实现TFT器件的方法，包括以下步骤：级联地形成非晶硅层和重掺杂非晶硅层，在设置有开口的重掺杂非晶硅层上形成光刻掩模， 通过开口去除重掺杂的非晶硅层，用于实现重掺杂非晶硅层的相对部分，其横截面尺寸随着离开非晶硅层而减小，除去光刻掩模，进行扩散和激活步骤 包含在非晶硅层内部的重掺杂非晶硅层的部分中的掺杂物，用于实现所述TFT器件的源极/漏极区域。

公开(公告)号：US08575720B2

公开(公告)日：2013-11-05

申请号：US11803716

申请日：2007-05-14

申请人： Salvatore Leonardi ,  Salvatore Coffa ,  Claudia Caligiore ,  Francesca Paola Tramontana

发明人： Salvatore Leonardi ,  Salvatore Coffa ,  Claudia Caligiore ,  Francesca Paola Tramontana

IPC分类号： H01L27/08

CPC分类号： H01L21/84 ,  H01L27/12

摘要： A process is described for integrating, on an inert substrate, a device having at least one passive component and one active component. The process comprises: deposition of a protection dielectric layer on the inert substrate; formation of a polysilicon island on the protection dielectric layer; integration of the active component on the polysilicon island; deposition of the covering dielectric layer on the protection dielectric layer and on the active component; integration of the passive component on the covering dielectric layer; formation of first contact structures in openings realised in the covering dielectric layer in correspondence with active regions of the active component; and formation of second contact structures in correspondence with the passive component. An integrated device obtained through this process is also described.

摘要翻译： 描述了一种在惰性基板上集成具有至少一个无源部件和一个有源部件的装置的方法。 该方法包括：将保护电介质层沉积在惰性衬底上; 在保护电介质层上形成多晶硅岛; 有源元件在多晶硅岛上的集成; 覆盖电介质层沉积在保护电介质层和有源元件上; 将被动元件集成在覆盖介电层上; 在与所述有源部件的有源区域对应的覆盖介电层中实现的开口中形成第一接触结构; 以及与被动部件对应地形成第二接触结构。 还描述了通过该方法获得的集成装置。

公开(公告)号：US07952104B2

公开(公告)日：2011-05-31

申请号：US12564719

申请日：2009-09-22

申请人： Salvatore Leonardi ,  Claudia Caligiore

发明人： Salvatore Leonardi ,  Claudia Caligiore

IPC分类号： H01L29/04 ,  H01L31/036

CPC分类号： H01L21/02686 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/2026 ,  H01L27/1229 ,  H01L27/1281 ,  H01L29/66757

摘要： A process for manufacturing a thin-film transistor device includes forming a dielectric insulation layer on a substrate, forming an amorphous silicon layer on the dielectric insulation layer, crystallizing the amorphous silicon layer, so as to obtain polycrystalline silicon, forming gate structures on the polycrystalline silicon, and forming first doped regions within the polycrystalline silicon laterally with respect to the gate structures. The crystallizing step includes forming first capping dielectric regions on the amorphous silicon layer, and then irradiating the amorphous silicon layer using a laser so as to form active areas of polycrystalline silicon separated by separation portions of amorphous silicon underlying the first capping dielectric regions.

摘要翻译： 一种薄膜晶体管器件的制造方法，其特征在于，在基板上形成介电绝缘层，在所述绝缘层上形成非晶硅层，使所述非晶硅层结晶化，得到多晶硅，在所述多晶硅上形成栅极结构 硅，并且相对于栅极结构横向地在多晶硅内形成第一掺杂区域。 所述结晶步骤包括在所述非晶硅层上形成第一覆盖电介质区域，然后使用激光照射所述非晶硅层，以便形成由所述第一覆盖电介质区域下方的非晶硅的分离部分分离的多晶硅的有源区域。

公开(公告)号：US20070034872A1

公开(公告)日：2007-02-15

申请号：US11478332

申请日：2006-06-28

申请人： Salvatore Leonardi ,  Claudia Caligiore

发明人： Salvatore Leonardi ,  Claudia Caligiore

IPC分类号： H01L29/04

CPC分类号： H01L21/02686 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/2026 ,  H01L27/1229 ,  H01L27/1281 ,  H01L29/66757

摘要： A process for manufacturing a thin-film transistor device includes forming a dielectric insulation layer on a substrate, forming an amorphous silicon layer on the dielectric insulation layer, crystallizing the amorphous silicon layer, so as to obtain polycrystalline silicon, forming gate structures on the polycrystalline silicon, and forming first doped regions within the polycrystalline silicon laterally with respect to the gate structures. The crystallizing step includes forming first capping dielectric regions on the amorphous silicon layer, and then irradiating the amorphous silicon layer using a laser so as to form active areas of polycrystalline silicon separated by separation portions of amorphous silicon underlying the first capping dielectric regions.

摘要翻译： 一种薄膜晶体管器件的制造方法，其特征在于，在基板上形成介电绝缘层，在所述绝缘层上形成非晶硅层，使所述非晶硅层结晶化，得到多晶硅，在所述多晶硅上形成栅极结构 硅，并且相对于栅极结构横向地在多晶硅内形成第一掺杂区域。 所述结晶步骤包括在所述非晶硅层上形成第一覆盖电介质区域，然后使用激光照射所述非晶硅层，以便形成由所述第一覆盖电介质区域下方的非晶硅的分离部分分离的多晶硅的有源区域。

公开(公告)号：US08853800B2

公开(公告)日：2014-10-07

申请号：US13178076

申请日：2011-07-07

申请人： Claudia Caligiore ,  Salvatore Leonardi ,  Salvatore Baglio ,  Bruno Ando′

发明人： Claudia Caligiore ,  Salvatore Leonardi ,  Salvatore Baglio ,  Bruno Ando′

IPC分类号： H01L29/84 ,  B81C1/00

CPC分类号： B81C1/00246 ,  B81B2201/032 ,  B81B2201/058 ,  B81B2203/0338

摘要： An embodiment relates to a device integrated on a semiconductor substrate of a type comprising at least one first portion for the integration of at least one microfluidic system, and a second portion for the integration of an additional circuitry. The microfluidic system comprises at least one cavity realized in a containment layer of the integrated device closed on top by at least one portion of a polysilicon layer, this polysilicon layer being a thin layer shared by the additional circuitry and the closing portion of the cavity realizing a piezoresistive membrane for the microfluidic system.

摘要翻译： 实施例涉及集成在半导体衬底上的器件，其类型包括用于集成至少一个微流体系统的至少一个第一部分和用于集成附加电路的第二部分。 微流体系统包括在集成装置的容纳层中实现的至少一个空腔，其通过多晶硅层的至少一部分封装在顶部上，该多晶硅层是由附加电路共享的薄层和空腔的闭合部分，其实现 用于微流体系统的压阻膜。

公开(公告)号：US07611933B2

公开(公告)日：2009-11-03

申请号：US11478332

申请日：2006-06-28

申请人： Salvatore Leonardi ,  Claudia Caligiore

发明人： Salvatore Leonardi ,  Claudia Caligiore

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L21/02686 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/2026 ,  H01L27/1229 ,  H01L27/1281 ,  H01L29/66757

摘要： A process for manufacturing a thin-film transistor device includes forming a dielectric insulation layer on a substrate, forming an amorphous silicon layer on the dielectric insulation layer, crystallizing the amorphous silicon layer, so as to obtain polycrystalline silicon, forming gate structures on the polycrystalline silicon, and forming first doped regions within the polycrystalline silicon laterally with respect to the gate structures. The crystallizing step includes forming first capping dielectric regions on the amorphous silicon layer, and then irradiating the amorphous silicon layer using a laser so as to form active areas of polycrystalline silicon separated by separation portions of amorphous silicon underlying the first capping dielectric regions.

摘要翻译： 一种薄膜晶体管器件的制造方法，其特征在于，在基板上形成介电绝缘层，在所述绝缘层上形成非晶硅层，使所述非晶硅层结晶化，得到多晶硅，在所述多晶硅上形成栅极结构 硅，并且相对于栅极结构横向地在多晶硅内形成第一掺杂区域。 所述结晶步骤包括在所述非晶硅层上形成第一覆盖电介质区域，然后使用激光照射所述非晶硅层，以便形成由所述第一覆盖电介质区域下方的非晶硅的分离部分分离的多晶硅的有源区域。

公开(公告)号：US08111217B2

公开(公告)日：2012-02-07

申请号：US12019577

申请日：2008-01-24

申请人： Claudia Caligiore ,  Giuseppe Antonio Maria Nastasi ,  Lidia Maddiona ,  Salvatore Abbisso ,  Salvatore Leonardi

发明人： Claudia Caligiore ,  Giuseppe Antonio Maria Nastasi ,  Lidia Maddiona ,  Salvatore Abbisso ,  Salvatore Leonardi

IPC分类号： G09G3/30

CPC分类号： G09G3/3233 ,  G09G2300/0809 ,  G09G2310/0216 ,  G09G2310/0262

摘要： A driving circuit of an OLED diode is inserted between a first and a second voltage reference and having at least one input terminal receiving an input voltage signal and an output terminal for the generation of a driving current of the OLED diode, the driving circuit having at least one driver transistor having a first conduction terminal connected to the first voltage reference, a second conduction terminal connected to the output terminal and a control terminal connected to at least one first capacitor and one second capacitor. The first capacitor is inserted between this control terminal and an inner circuit node and the second capacitor is inserted between the inner circuit node and the second voltage reference, the driving circuit 10 further including: a first switch inserted between the input terminal and the inner circuit node; a second switch inserted between the first conduction terminal and control terminal of the driver transistor, and a third switch inserted between the inner circuit node and the second voltage reference, in parallel to the second capacitor, as well as a fourth switch inserted between the first voltage reference and the first conduction terminal of the driver transistor.

摘要翻译： OLED二极管的驱动电路插入在第一和第二参考电压之间并具有接收输入电压信号的至少一个输入端和用于产生OLED二极管的驱动电流的输出端，驱动电路具有 至少一个驱动晶体管具有连接到第一参考电压的第一导通端子，连接到输出端子的第二导通端子和连接到至少一个第一电容器和一个第二电容器的控制端子。 第一电容器插入在该控制端子和内部电路节点之间，并且第二电容器插入在内部电路节点和第二电压基准之间，驱动电路10还包括：插入在输入端子和内部电路之间的第一开关 节点; 插入驱动晶体管的第一导通端子和控制端子之间的第二开关和插入在内部电路节点和第二参考电压之间的第三开关并联于第二电容器，以及插入在第一和第二开关之间的第四开关 电压基准和驱动晶体管的第一导通端子。

公开(公告)号：US20080211746A1

公开(公告)日：2008-09-04

申请号：US12019577

申请日：2008-01-24

申请人： Claudia Caligiore ,  Giuseppe Antonio Maria Nastasi ,  Lidia Maddiona ,  Salvatore Abbisso ,  Salvatore Leonardi

发明人： Claudia Caligiore ,  Giuseppe Antonio Maria Nastasi ,  Lidia Maddiona ,  Salvatore Abbisso ,  Salvatore Leonardi

IPC分类号： G09G3/30

CPC分类号： G09G3/3233 ,  G09G2300/0809 ,  G09G2310/0216 ,  G09G2310/0262

摘要： A driving circuit of an OLED diode is inserted between a first and a second voltage reference and having at least one input terminal receiving an input voltage signal and an output terminal for the generation of a driving current of the OLED diode, the driving circuit having at least one driver transistor having a first conduction terminal connected to the first voltage reference, a second conduction terminal connected to the output terminal and a control terminal connected to at least one first capacitor and one second capacitor. The first capacitor is inserted between this control terminal and an inner circuit node and the second capacitor is inserted between the inner circuit node and the second voltage reference, the driving circuit 10 further including: a first switch inserted between the input terminal and the inner circuit node; a second switch inserted between the first conduction terminal and control terminal of the driver transistor, and a third switch inserted between the inner circuit node and the second voltage reference, in parallel to the second capacitor, as well as a fourth switch inserted between the first voltage reference and the first conduction terminal of the driver transistor.

摘要翻译： OLED二极管的驱动电路插入在第一和第二参考电压之间并具有接收输入电压信号的至少一个输入端和用于产生OLED二极管的驱动电流的输出端，驱动电路具有 至少一个驱动晶体管具有连接到第一参考电压的第一导通端子，连接到输出端子的第二导通端子和连接到至少一个第一电容器和一个第二电容器的控制端子。 第一电容器插入在该控制端子和内部电路节点之间，并且第二电容器插入在内部电路节点和第二电压基准之间，驱动电路10还包括：插入在输入端子和内部电路之间的第一开关 节点; 插入驱动晶体管的第一导通端子和控制端子之间的第二开关和插入在内部电路节点和第二参考电压之间的第三开关并联于第二电容器，以及插入在第一和第二开关之间的第四开关 电压基准和驱动晶体管的第一导通端子。