DISPLAY DEVICE
    2.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20240234662A1

    公开(公告)日:2024-07-11

    申请号:US18453082

    申请日:2023-08-21

    Abstract: A display device includes: a substrate; a first conductive layer on the substrate and including a lower conductive pattern and a capacitor conductive pattern spaced apart from the lower conductive pattern in a plan view; an active layer on the first conductive layer, partially overlapping the lower conductive pattern and the capacitor conductive pattern in the plan view, and including a driving active pattern defining a storage capacitor together with the capacitor conductive pattern; a second conductive layer on the active layer, partially overlapping the lower conductive pattern and the driving active pattern in the plan view, and including a control pattern defining a driving transistor together with the driving active pattern; and a third conductive layer on the second conductive layer and including an anode electrode partially overlapping the lower conductive pattern in the plan view.

    DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20240065045A1

    公开(公告)日:2024-02-22

    申请号:US18124604

    申请日:2023-03-22

    CPC classification number: H10K59/124 H10K59/1201

    Abstract: A display panel includes a base substrate, a transistor disposed on the base substrate and including a semiconductor pattern including a source area, a drain area, and an active area, a gate insulating pattern layer disposed on the semiconductor pattern, and a gate electrode disposed on the gate insulating pattern, and connection electrodes disposed on the gate insulating pattern layer and connected to the semiconductor pattern through contact holes, respectively. The gate insulating pattern layer includes a first portion overlapping at least one of the source area and the drain area and a second portion extending from the first portion. A thickness of the first portion is equal to or smaller than about 50% of a thickness of the second portion.

    DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20230128398A1

    公开(公告)日:2023-04-27

    申请号:US17874702

    申请日:2022-07-27

    Abstract: A display device includes a pixel, a first pad electrode disposed around the pixel, a buffer layer disposed on the first pad electrode, a first insulating layer disposed on the buffer layer, and a second pad electrode disposed on the first insulating layer, the second pad electrode being electrically connected to the first pad electrode through a contact hole in the first insulating layer and the buffer layer. A first step, a second step below the first step, and a third step below the second step are defined on the first insulating layer and the buffer layer around the first pad electrode and the second pad electrode.

    ELECTRONIC DEVICE
    5.
    发明申请
    ELECTRONIC DEVICE 审中-公开

    公开(公告)号:US20200064958A1

    公开(公告)日:2020-02-27

    申请号:US16672892

    申请日:2019-11-04

    Abstract: An electronic device includes a first electrode, a second electrode, and a third electrode. The first electrode includes a first boundary side extending in a direction. The second electrode includes a second boundary side extending in the direction. The third electrode is disposed between and spaced apart from the first electrode and the second electrode. The third electrode includes a first side facing the first boundary side and a second side facing the second boundary. The first side and the second side have shapes that are asymmetric to each other with respect to a center axis extending in the direction.

    PIXEL AND DISPLAY DEVICE INCLUDING THE SAME

    公开(公告)号:US20240373693A1

    公开(公告)日:2024-11-07

    申请号:US18431907

    申请日:2024-02-02

    Abstract: A pixel includes a first transistor including a first terminal configured to receive a driving voltage, a second terminal connected to a light-emitting diode, and a gate terminal connected to a node, a second transistor including a first terminal configured to receive a data voltage, a second terminal connected to the node, and a gate terminal configured to receive a scan signal, a third transistor including a first terminal configured to receive an initialization voltage, a second terminal connected to the light-emitting diode, and a gate terminal configured to receive a sensing signal, and a fourth transistor including a first terminal configured to receive a scan clock signal, a second terminal connected to the gate terminal of the second transistor, and a gate terminal configured to receive a voltage of a Q node.

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