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公开(公告)号:US20240023394A1
公开(公告)日:2024-01-18
申请号:US18373277
申请日:2023-09-27
Applicant: Samsung Display Co., Ltd.
Inventor: Soyoung Koo , Eoksu Kim , Hyungjun Kim , Yunyong Nam , Junhyung Lim , Kyungjin Jeon
IPC: H10K59/131 , G09G3/3291 , G09G3/3266 , H10K59/122
CPC classification number: H10K59/131 , G09G3/3291 , G09G3/3266 , H10K59/122 , G09G2300/0426 , H10K59/1201
Abstract: A display apparatus is disclosed that includes contact holes formed to expose at least a portion of a conductive layer or a semiconductor layer without damage to the surface of the conductive layer or the semiconductor layer, and a method of manufacturing the display apparatus. The display apparatus includes a substrate, a conductive mound arranged on the substrate, a first insulating mound arranged on the substrate, and a semiconductor layer including a first region arranged on the conductive mound, and a second region arranged on the first insulating mound. The second region of the semiconductor layer substantially covers an upper surface of the first insulating mound.
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公开(公告)号:US11812647B2
公开(公告)日:2023-11-07
申请号:US17841206
申请日:2022-06-15
Applicant: Samsung Display Co., Ltd.
Inventor: Soyoung Koo , Eoksu Kim , Hyungjun Kim , Yunyong Nam , Junhyung Lim , Kyungjin Jeon
IPC: H10K59/131 , G09G3/3266 , G09G3/3291 , H10K59/122 , H10K59/12
CPC classification number: H10K59/131 , G09G3/3266 , G09G3/3291 , H10K59/122 , G09G2300/0426 , H10K59/1201
Abstract: A display apparatus is disclosed that includes contact holes formed to expose at least a portion of a conductive layer or a semiconductor layer without damage to the surface of the conductive layer or the semiconductor layer, and a method of manufacturing the display apparatus. The display apparatus includes a substrate, a conductive mound arranged on the substrate, a first insulating mound arranged on the substrate, and a semiconductor layer including a first region arranged on the conductive mound, and a second region arranged on the first insulating mound. The second region of the semiconductor layer substantially covers an upper surface of the first insulating mound.
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公开(公告)号:US11049929B2
公开(公告)日:2021-06-29
申请号:US16804152
申请日:2020-02-28
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Kyungjin Jeon , Joonseok Park , Soyoung Koo , Myounghwa Kim , Eoksu Kim , Taesang Kim , Hyungjun Kim , Yeonkeon Moon , Geunchul Park , Sangwoo Sohn , Junhyung Lim , Hyelim Choi
Abstract: A display device includes: a substrate; a first thin film transistor and a second thin film transistor arranged over the substrate; a display element connected to the first thin film transistor; a wiring connected to the second thin film transistor and including a first wiring layer and a second wiring layer; a pattern insulating layer arranged between the first wiring layer and the second wiring layer; a planarization layer covering the wiring; and a connection electrode arranged on the planarization layer and connected to the first wiring layer and the second wiring layer respectively through a first contact hole and a second contact hole.
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公开(公告)号:US11950455B2
公开(公告)日:2024-04-02
申请号:US17287936
申请日:2019-02-20
Applicant: Samsung Display Co., Ltd.
Inventor: Yeonkeon Moon , Joonseok Park , Kwang-suk Kim , Myounghwa Kim , Taesang Kim , Geunchul Park , Kyungjin Jeon
IPC: H01L29/786 , H01L27/12 , H10K59/121 , H10K59/131
CPC classification number: H10K59/1213 , H01L29/78618 , H01L29/7869 , H01L29/78696 , H10K59/131
Abstract: A transistor substrate may include a substrate including a first region and a second region, a first buffer layer disposed in the first region on the substrate and including silicon nitride, a second buffer layer disposed in the first region and the second region on the first buffer layer and including silicon oxide, a first transistor disposed in the first region on the second buffer layer and including a first oxide semiconductor layer and a first gate electrode overlapping the first oxide semiconductor layer, and a second transistor disposed in the second region on the second buffer layer and including a second oxide semiconductor layer and a second gate electrode overlapping the second oxide semiconductor layer.
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公开(公告)号:US11678547B2
公开(公告)日:2023-06-13
申请号:US17328026
申请日:2021-05-24
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Kyungjin Jeon , Joonseok Park , Soyoung Koo , Myounghwa Kim , Eoksu Kim , Taesang Kim , Hyungjun Kim , Yeonkeon Moon , Geunchul Park , Sangwoo Sohn , Junhyung Lim , Hyelim Choi
CPC classification number: H01L27/3279 , H01L27/3248 , H01L27/3258 , H01L27/3265 , H01L51/524 , H01L51/5253 , H01L51/56 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/1288 , H01L28/60 , H01L2227/323
Abstract: A display device includes: a substrate; a first thin film transistor and a second thin film transistor arranged over the substrate; a display element connected to the first thin film transistor; a wiring connected to the second thin film transistor and including a first wiring layer and a second wiring layer; a pattern insulating layer arranged between the first wiring layer and the second wiring layer; a planarization layer covering the wiring; and a connection electrode arranged on the planarization layer and connected to the first wiring layer and the second wiring layer respectively through a first contact hole and a second contact hole.
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公开(公告)号:US20230037108A1
公开(公告)日:2023-02-02
申请号:US17841206
申请日:2022-06-15
Applicant: Samsung Display Co., Ltd.
Inventor: Soyoung Koo , Eoksu Kim , Hyungjun Kim , Yunyong Nam , Junhyung Lim , Kyungjin Jeon
IPC: H01L27/32 , G09G3/3266 , G09G3/3291
Abstract: A display apparatus is disclosed that includes contact holes formed to expose at least a portion of a conductive layer or a semiconductor layer without damage to the surface of the conductive layer or the semiconductor layer, and a method of manufacturing the display apparatus. The display apparatus includes a substrate, a conductive mound arranged on the substrate, a first insulating mound arranged on the substrate, and a semiconductor layer including a first region arranged on the conductive mound, and a second region arranged on the first insulating mound. The second region of the semiconductor layer substantially covers an upper surface of the first insulating mound.
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公开(公告)号:US11495650B2
公开(公告)日:2022-11-08
申请号:US17081342
申请日:2020-10-27
Applicant: Samsung Display Co., Ltd.
Inventor: Kyungjin Jeon , Soyoung Koo , Eoksu Kim , Junhyung Lim
Abstract: A display apparatus includes a thin film transistor facing a substrate with a buffer layer therebetween and including a semiconductor layer, a channel region, a source region, a drain region, and a gate electrode; a conductive pattern between the substrate and the semiconductor layer and connected to the semiconductor layer, the conductive pattern facing the semiconductor layer with the buffer layer therebetween; a contact hole in the buffer layer and exposing the conductive pattern to outside the buffer layer; and a display element which is electrically connected to the thin film transistor. The source region or the drain region extends through the contact hole in the buffer layer, to contact the conductive pattern and connect the semiconductor layer to the conductive pattern.
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公开(公告)号:US20210280667A1
公开(公告)日:2021-09-09
申请号:US17328026
申请日:2021-05-24
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Kyungjin Jeon , Joonseok Park , Soyoung Koo , Myounghwa Kim , Eoksu Kim , Taesang Kim , Hyungjun Kim , Yeonkeon Moon , Geunchul Park , Sangwoo Sohn , Junhyung Lim , Hyelim Choi
Abstract: A display device includes: a substrate; a first thin film transistor and a second thin film transistor arranged over the substrate; a display element connected to the first thin film transistor; a wiring connected to the second thin film transistor and including a first wiring layer and a second wiring layer; a pattern insulating layer arranged between the first wiring layer and the second wiring layer; a planarization layer covering the wiring; and a connection electrode arranged on the planarization layer and connected to the first wiring layer and the second wiring layer respectively through a first contact hole and a second contact hole.
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公开(公告)号:US12225794B2
公开(公告)日:2025-02-11
申请号:US18373277
申请日:2023-09-27
Applicant: Samsung Display Co., Ltd.
Inventor: Soyoung Koo , Eoksu Kim , Hyungjun Kim , Yunyong Nam , Junhyung Lim , Kyungjin Jeon
IPC: H10K59/131 , G09G3/3266 , G09G3/3291 , H10K59/122 , H10K59/12
Abstract: A display apparatus is disclosed that includes contact holes formed to expose at least a portion of a conductive layer or a semiconductor layer without damage to the surface of the conductive layer or the semiconductor layer, and a method of manufacturing the display apparatus. The display apparatus includes a substrate, a conductive mound arranged on the substrate, a first insulating mound arranged on the substrate, and a semiconductor layer including a first region arranged on the conductive mound, and a second region arranged on the first insulating mound. The second region of the semiconductor layer substantially covers an upper surface of the first insulating mound.
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公开(公告)号:US12225771B2
公开(公告)日:2025-02-11
申请号:US17318350
申请日:2021-05-12
Applicant: Samsung Display Co., Ltd.
Inventor: Hyungjun Kim , Soyoung Koo , Eok Su Kim , Yunyong Nam , Jun Hyung Lim , Kyungjin Jeon
IPC: H10K59/121 , H10K59/126 , H10K71/00 , H10K59/12 , H10K59/123
Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.
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