Abstract:
A display device includes a display panel, a data driver, a gate driver, and a controller. The display panel includes a plurality of pixels. The data driver provides data voltages to the plurality of pixels through data lines during an active period of a frame period and provides a blank voltage to the plurality of pixels through the data lines during a blank period of the frame period. The gate driver provides a gate-on voltage to the plurality of pixels through gate lines during the active period and provides a gate-off voltage to the plurality of pixels through the gate lines during the blank period. The controller controls the data driver and the gate driver. The blank voltage increases and the gate-off voltage increases, when a time in the blank period reaches a predetermined time.
Abstract:
A display apparatus including a plurality of pixels arranged in association with a plurality of gate lines and a plurality of data lines crossing the gate lines, a data driver configured to drive the data lines, a gate driving unit configured to drive the gate lines in synchronization with a gate control signal, and a timing controller configured to control the data driver and the gate driving unit in response to an image signal and a control signal from an exterior. The timing controller outputs the gate control signal including a plurality of pulses respectively corresponding to the gate lines and an enable time of each pulse of the gate control signal is set according to a position of a corresponding gate line of the gate lines.
Abstract:
A gate driving circuit includes: a plurality of driving stages, each driving stage configured to provide a gate signal to a corresponding gate line among a plurality of gate lines, wherein each of the plurality of driving stages includes: a first transistor electrically connected between a first clock terminal and a gate output terminal, the first transistor including a gate electrode electrically connected to a first node, the first clock terminal to receive a first clock signal; a second transistor configured to transmit a first carry signal to the first node; and a third transistor electrically connected between the first node and a first voltage terminal, the third transistor including a gate electrode electrically connected to the first voltage terminal, the first voltage terminal to receive a first voltage, wherein the gate output terminal is electrically connected to the corresponding gate line.
Abstract:
A display apparatus includes a display panel, a data driving part and a gate driving part. The gate driving part outputs gate signals to gate lines, respectively, increases the gate signal from a first gate off voltage to a gate on voltage, decreases the gate signal from the gate on voltage to the first gate off voltage, decreases the gate signal from the first gate off voltage to a second gate off voltage in a slope less than a slope in which the gate signal decreases from the gate on voltage to the first gate off voltage, during P (P is a natural number) horizontal time in which P gate line of the gate lines is driven, and increases the gate signal from the second gate off voltage to the first gate off voltage.
Abstract:
A control board in a display device includes terminals and a control circuit. The control circuit is configured to output a control signal an image signal through the terminals and to generate a drive voltage in response to a feedback signal, which is fed back to a second terminal of the terminals when a source voltage is applied to a first terminal of the terminals.
Abstract:
A pixel circuit includes a light emitting element including a first electrode and a second electrode, a first switching element including a control electrode, a second switching element, a third switching element, a sensing resistor and a fourth switching element. The first switching element applies a first power voltage to the first electrode of the light emitting element. The second switching element applies a data voltage to the control electrode of the first switching element. The third switching element senses a signal of the first electrode of the light emitting element. The sensing resistor includes a first end connected to the second electrode of the light emitting element and a second end which receives a second power voltage. The fourth switching element senses a signal of the second electrode of the light emitting element.
Abstract:
A display device includes a controller, a panel driver, and a voltage generator. The controller generates a first control signal and generates image data and a second control signal in response to first and second image signals. The panel driver generates a driving signal in response to the image data and the first control signal to drive a display panel. The voltage generator generates a driving voltage to drive the display panel and changes a voltage level of the driving voltage in response to the second control signal. The first image signal corresponds to a second frame located before a third frame in which the driving voltage is changed. The second image signal corresponds to a first frame located before the second frame. The controller generates image data corresponding to the second frame in response to the first image signal and the second image signal.
Abstract:
A display apparatus including: gate lines extending in a first direction; data lines extending in a second direction intersecting the first direction; pixels connected to corresponding ones of the gate lines and data lines; a gate driver to drive the gate lines in response to a gate clock signal; a data driver to drive the data lines; a memory to store charge share signals corresponding to the gate lines; a timing controller controlling the data driver and the gate driver, in response to an externally input control signal and an image signal, and to output a gate pulse signal to the gate lines; and a clock generator configured to generate the gate clock signal in response to the gate pulse signal. The timing controller is configured to output the gate pulse signals according to the charge share signals.
Abstract:
A gate driving module includes a gate driver and a gate signal generator. The gate driver generates a vertical start signal, a plurality of gate clock signals and a plurality of inverse gate clock signals based on a vertical start control signal, a plurality of gate clock control signals, a gate on voltage, a first gate off voltage and a second gate off voltage. The number of the gate clock signals is P. The number of the inverse gate clock signals is P. The number of the gate clock control signals is P. P is a positive integer equal to or greater than two. The gate signal generator generates a gate signal based on the vertical start signal, the gate clock signals and the inverse gate clock signals.
Abstract:
A pixel includes a capacitor including a first electrode and a second electrode, a first transistor which generates a driving current, a second transistor which applies a data voltage to the first electrode of the capacitor, a third transistor which applies an initialization voltage to the second electrode of the capacitor, a fourth transistor which generates a leakage current in response to a dimming signal, and a light emitting element which emits light based on a residual driving current, where the residual driving current is obtained by subtracting the leakage current from the driving current.