Abstract:
A gamma reference voltage generating circuit including a first resistor string disposed between a first reference voltage node and a second reference voltage node, a first multiplexer connected to the first resistor string and determining a level of a first gamma reference voltage, a first amplifier connected to the first multiplexer and outputting the first gamma reference voltage, a first resistor connected between an output terminal of the first amplifier and a first previous gamma voltage output node, a second resistor connected between the output terminal of the first amplifier and a first next gamma voltage output node, a first compensating resistor connected between a second previous gamma voltage output node and the present gamma voltage output node, and a second compensating resistor connected between a second next gamma voltage output node and the present gamma voltage output node.
Abstract:
A display apparatus includes a display panel, a first data driver, a second data driver, and a first capacitor. The display panel is connected to a plurality of data lines. The first data driver is connected to first data lines among the plurality of data lines, and is configured to perform a first charge sharing for the first data lines. The second data driver is connected to second data lines among the plurality of data lines, and is configured to perform a second charge sharing for the second data lines. The first capacitor is connected to the first data driver and the second data driver. Each of the first and second charge sharings is performed using the first capacitor.
Abstract:
A gate driving module includes a gate driver and a gate signal generator. The gate driver generates a vertical start signal, a plurality of gate clock signals and a plurality of inverse gate clock signals based on a vertical start control signal, a plurality of gate clock control signals, a gate on voltage, a first gate off voltage and a second gate off voltage. The number of the gate clock signals is P. The number of the inverse gate clock signals is P. The number of the gate clock control signals is P. P is a positive integer equal to or greater than two. The gate signal generator generates a gate signal based on the vertical start signal, the gate clock signals and the inverse gate clock signals.
Abstract:
An image signal modifying method is disclosed. In one aspect, the image signal modifying method includes inputting a gray level interval of a first dynamic capacitance compensation (DCC) lookup table to a current gray level which is a target in a previous image signal when it is overdriven (DTG) and 0 to a gray level of the previous image signal (PIG). The method also includes searching for a data value in an adaptive color correction (ACC) lookup table corresponding to a gray level equal to a numerical value of the DTG (ALT) and performing an algorithm based on the DTG, the ALT, and the gray level interval of the first DCC lookup table. The method further includes generating a second DCC lookup table based on the algorithm, and performing second DCC processing on the input image signal based on the second DCC lookup table.
Abstract:
A display panel driving apparatus is disclosed. In one aspect the apparatus includes a gate driving part and a data driving part. The gate driving part is configured to increase a gate signal applied to a gate line of a display panel from an OFF voltage to a ON voltage, in response to an activation of a gate clock signal. It is also configured to decrease the gate signal from the ON voltage to a kickback compensation voltage between the OFF voltage and the ON voltage through a plurality of steps in response to an activation of a kickback compensation signal. The data driving part is configured to apply a data signal to a data line of the display panel. Therefore, a data-charging rate may be increased, and thus a display quality of the display apparatus may be increased.
Abstract:
A display apparatus including a plurality of pixels arranged in association with a plurality of gate lines and a plurality of data lines crossing the gate lines, a data driver configured to drive the data lines, a gate driving unit configured to drive the gate lines in synchronization with a gate control signal, and a timing controller configured to control the data driver and the gate driving unit in response to an image signal and a control signal from an exterior. The timing controller outputs the gate control signal including a plurality of pulses respectively corresponding to the gate lines and an enable time of each pulse of the gate control signal is set according to a position of a corresponding gate line of the gate lines.
Abstract:
A flexible circuit film including a first flexible film, a second flexible film facing the first flexible film, and a plurality of wirings arranged between the first flexible film and the second flexible film. The wirings have different widths and bend in different directions, and a guide film including a material more rigid than the first and second flexible films is arranged on ends of the first flexible film. The guide film includes a tear-preventing portion overlapping with a bending portion of a shortest one of the wirings while covering portions of an inner edge near inner corners of a U-shaped flexible circuit film.
Abstract:
A digital gamma correction part includes a memory and a selector. The memory is configured to store a basic gamma reference data, a first compensated gamma reference data and a second compensated gamma reference data, where respective data of the first compensated gamma reference data are greater than respective data of the basic gamma reference data, and respective data of the second compensated gamma reference data are less than respective data of the basic gamma reference data. The selector is configured to receive a luminance data determined based on a luminance of a display panel, and to output a gamma reference data by selecting one from the basic gamma reference data, the first compensated gamma reference data and the second compensated gamma reference data based on the luminance data and a gamma converted reference range.
Abstract:
A flexible circuit film includes a first flexible film, a second flexible film facing the first flexible film, a plurality of wirings arranged between the first flexible film and the second flexible film and extending in a first direction, then bending to extend in a second direction crossing the first direction, and then bending a second time to extend in an opposing direction to the first direction, and a guide film including a material more rigid than the first and second flexible films and arranged on an ends of the first flexible film. The guide film includes a tear-preventing portion overlapping with a bending portion of a shortest one of the wirings while covering portions of an inner edge near inner corners of a U-shaped flexible circuit film.
Abstract:
A control board in a display device includes terminals and a control circuit. The control circuit is configured to output a control signal an image signal through the terminals and to generate a drive voltage in response to a feedback signal, which is fed back to a second terminal of the terminals when a source voltage is applied to a first terminal of the terminals.