Abstract:
A liquid crystal display device, including a display panel including data lines and gate lines intersecting the data lines, a gate driver configured to sequentially apply a scan signal to the gate lines, a data driver configured to apply data voltages corresponding to each gate lines to the data lines, a timing controller configured to control the gate driver and the data driver, a power source supply circuit configured to supply a positive power source and a negative power source, a common voltage feedback circuit configured to receive the positive power source and the negative power source from the power source supply circuit, receive a reference voltage and a common voltage from the display panel, and output an amplified feedback signal corresponding to a voltage level difference between the reference voltage and the common voltage.
Abstract:
A method of driving a display panel, the method including outputting video data to a display panel during an N-th (N is a natural number) frame, outputting video data to the display panel during an (N+1)-th frame, comparing polarities of video data of the N-th frame and corresponding polarities of video data of the (N+1)-th frame, and controlling polarities of video data of an (N+2)-th frame, according to the result of the comparison.
Abstract:
A method of driving a display panel includes charging a pixel with first data during a first charging period, comparing a first grayscale of the first data and a second grayscale of second data, charging the pixel with compensated data during a second charging period if the first grayscale is greater than the second grayscale, and charging the pixel with the second data during a third charging period.
Abstract:
A method of driving a display panel includes steps of generating a plurality of load signals, of which at least one load signal has a different timing from the rest of the load signals, generating data voltages synchronized to low periods of the load signals and outputting the data voltages to data lines. Accordingly, the data voltages synchronized to each of the load signals can be outputted to each of the data lines. A color coordinate problem occurring when applying a RGBW type may be solved by setting a charging time of a white sub-pixel different from the rest of the sub-pixels. Thus, display quality of a display apparatus including the display panel may be improved.
Abstract:
A method of driving a display panel includes steps of generating a plurality of load signals, of which at least one load signal has a different timing from the rest of the load signals, generating data voltages synchronized to low periods of the load signals and outputting the data voltages to data lines. Accordingly, the data voltages synchronized to each of the load signals can be outputted to each of the data lines. A color coordinate problem occurring when applying a RGBW type may be solved by setting a charging time of a white sub-pixel different from the rest of the sub-pixels. Thus, display quality of a display apparatus including the display panel may be improved.
Abstract:
A display panel driving apparatus includes a control circuit, a data driver and a gate driver. The control circuit is configured to receive a first control signal for recovering a clock signal from a display signal including image data and the clock signal, and calculate a root mean square of the first control signal to output a second control signal. The data driver is configured to receive the display signal, receive the second control signal, recover the clock signal from the display signal according to the second control signal, and output a data signal based on the image data to a data line of a display panel. The gate driving part is configured to output a gate signal to a gate line of the display panel.
Abstract:
A circuit includes a reference signal generating part configured to generate a plurality of reference signals having levels different from each other, a comparing part configured to compare a ripple signal with the reference signals to determine a level of the ripple signal, a compensating signal generating part configured to generate a compensation ripple signal corresponding to the level of the ripple signal, where the compensation ripple signal has a phase opposite to the ripple signal, and a push-pull circuit configured to stabilize the compensation ripple signal.
Abstract:
A gate driving module includes a gate driver and a gate signal generator. The gate driver generates a vertical start signal, a plurality of gate clock signals and a plurality of inverse gate clock signals based on a vertical start control signal, a plurality of gate clock control signals, a gate on voltage, a first gate off voltage and a second gate off voltage. The number of the gate clock signals is P. The number of the inverse gate clock signals is P. The number of the gate clock control signals is P. P is a positive integer equal to or greater than two. The gate signal generator generates a gate signal based on the vertical start signal, the gate clock signals and the inverse gate clock signals.
Abstract:
A display apparatus comprises a display panel including a plurality of data lines and a plurality of gate lines, a data driver circuit configured to convert image data to a grayscale voltage and to output the grayscale voltage to a data line, a voltage generator configured to provide the data driver circuit to a driving voltage, and a heat blocking circuit configured to compare a load current voltage with a reference voltage and to output a control signal for controlling the data driver circuit, the load current voltage being proportionate to a load current flowing toward the data driver circuit.
Abstract:
A display device includes a display panel, a variable gate clock generator and a gate driver. The display panel includes a plurality of pixels coupled to a plurality of data lines and a plurality of gate lines, respectively. The variable gate clock generator generates a first variable gate clock signal and a second variable gate clock signal having respective duty ratios that are varied depending on a brightness of a frame image. The gate driver generates a plurality of gate driving signals for driving the gate lines in response to the first and second variable gate clock signals.