公开(公告)号：US10424260B2

公开(公告)日：2019-09-24

申请号：US15793258

申请日：2017-10-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jeong Doo Lee ,  Sang Jun Park ,  Sung Jun Kim ,  Sung Yup Kim ,  Mi Young Park ,  Hee Bum Park

IPC: G09G5/02 ,  G09G3/36 ,  G09G3/20 ,  H01L27/32

Abstract: A display device includes a plurality of pixels, each including a first sub-pixel indicating a first color, a second sub-pixel indicating a second color, and a third sub-pixel indicating a third color, data lines coupled to pixels arranged in a first direction and configured to supply a data signal to the coupled pixels, gate lines coupled to pixels arranged in a second direction crossing the first direction and configured to supply a gate signal to the coupled pixels, and a compensation circuit configured to calculate a difference between grayscale values of a data signal to be supplied to the first to third sub-pixels, and generate a clock signal based on the difference that controls a start time at which the data signal is inputted to the pixels.

公开(公告)号：US11495655B2

公开(公告)日：2022-11-08

申请号：US17116126

申请日：2020-12-09

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jeong Doo Lee ,  Min Woo Kim

IPC: H01L27/32 ,  G09G3/00

Abstract: A display device includes a substrate having a display area and a non-display area. A plurality of pixels is disposed in the display area. A chip mount area is disposed on the non-display area. The chip mount area includes a data output pad unit, a lighting test transistor unit and a plurality of lines connecting the data output pad unit and the lighting test transistor unit. The lighting test transistor unit is configured to transfer at least one lighting test signal to the plurality of pixels through the data output pad unit. The resistances of each of the plurality of lines are the same.

公开(公告)号：US10818222B2

公开(公告)日：2020-10-27

申请号：US16595110

申请日：2019-10-07

Applicant: Samsung Display Co., Ltd.

Inventor： Jeong Doo Lee ,  Sang Kuk Kim ,  Young Mook Choi

IPC: G09G3/32

Abstract: An embodiment of a display device includes first, second, and third pixels including first, second, and third transistors, a first light-emitting stage to apply a first light-emitting signal including a first pulse at a turn-off level to a gate electrode of the first transistor, a second light-emitting stage to apply a second light-emitting signal including a second pulse at a turn-off level to a gate electrode of the second transistor, and a third light-emitting stage to apply a third light-emitting signal including a third pulse at a turn-off level to a gate electrode of the third transistor, wherein an interval between generation times of the first and second pulses is the same as an interval between generation times of the second and third pulses, and an interval between extinction times of the first and second pulses is different from an interval between extinction times of the second and third pulses.

公开(公告)号：US10019927B2

公开(公告)日：2018-07-10

申请号：US15000680

申请日：2016-01-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jeong Doo Lee ,  Min Young Park ,  Ki Hyun Pyun

IPC: G09G3/20

CPC classification number: G09G3/2003 ,  G09G3/3688 ,  G09G3/3696 ,  G09G2310/027 ,  G09G2310/0291 ,  G09G2320/0233 ,  G09G2320/0673 ,  G09G2330/02 ,  G09G2330/028

Abstract: A display device and a driving method thereof can reduce or prevent deterioration of image quality caused by ripples of a power voltage. A display device includes a gamma reference voltage generator generating a plurality of gamma reference voltages using a power voltage. A gamma selection signal generator generates a gamma selection signal corresponding to at least one gamma reference voltage among the gamma reference voltages and the power voltage. A gamma data supply unit stores a plurality of gamma data sets and outputs a gamma data set corresponding to the gamma selection signal from among the gamma data sets. A data driver generates a data signal using the gamma data set supplied from the gamma data supply unit and the gamma reference voltages. A display unit includes data lines transmitting the data signal.

公开(公告)号：US09966048B2

公开(公告)日：2018-05-08

申请号：US14660648

申请日：2015-03-17

Applicant: Samsung Display Co., Ltd.

Inventor： Yun Mi Kim ,  Ki Hyun Pyun ,  Sung Jun Kim ,  Min Young Park ,  Jeong Doo Lee ,  Kyung Hwa Lim

IPC: G09G5/395 ,  G11C7/16 ,  G11C16/08 ,  G11C16/10 ,  G09G3/36 ,  G09G5/12 ,  G09G5/393 ,  G11C16/26

CPC classification number: G09G5/395 ,  G09G3/3648 ,  G09G5/12 ,  G09G5/393 ,  G09G2330/021 ,  G09G2360/12 ,  G11C7/16 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26 ,  H03M1/66

Abstract: A memory is provided, which comprises an electrically erasable and programmable read only memory (EEPROM) configured to store an operation system and to be rewritable in response to a write operation signal, an address comparator configured to be connected to Inter Integrated Circuit (I2C) lines and output the write operation signal to the EEPROM in response to an external signal, a digital-to-analog converter (DAC) unit configured to determine whether to connect a DAC resistor and the I2C lines in response to the external signal and a pull-up resistor unit configured to be connected to the I2C lines.