公开(公告)号：US20200350383A1

公开(公告)日：2020-11-05

申请号：US16841189

申请日：2020-04-06

Applicant: Samsung Display Co., LTD.

Inventor： Seokhwan BANG ,  Jong-In KIM ,  Kangnam KIM ,  WooGeun LEE ,  Sung-Hoon LIM ,  Soojung CHAE

IPC: H01L27/32 ,  H01L51/56

Abstract: An organic light emitting diode display device includes a substrate, an active layer disposed on the substrate and including a metal oxide-based semiconductor, a gate electrode disposed on the active layer, an insulating layer disposed on the gate electrode, source and drain electrodes disposed on the insulating layer, a light emitting element on the source and drain electrodes, and a gate insulating layer between the active layer and the gate electrode. The gate insulating layer includes first and second gate insulating layers. The first gate insulating layer directly contacts the active layer and has a first amount of nitrogen. The second gate insulating layer is disposed on the first gate insulating layer and has a second amount of nitrogen that is different from the first amount of nitrogen.

公开(公告)号：US20220093029A1

公开(公告)日：2022-03-24

申请号：US17544862

申请日：2021-12-07

Applicant: Samsung Display Co., Ltd.

Inventor： Jaemin SEONG ,  Kangnam KIM ,  Jae-Hyun PARK ,  Hyunwook LEE

IPC: G09G3/20 ,  G09G3/3266 ,  G09G3/36 ,  G11C19/28

Abstract: A gate driver includes stages each including a first-transistor including a gate-electrode receiving an output-signal of one previous-stage or a vertical-start-signal as a first input-signal, a first-electrode receiving the first input-signal, and a second-electrode connected to a first-node, a second-transistor including a gate-electrode connected to the first-node, a first-electrode receiving a first clock-signal, and a second-electrode connected to a first-output-terminal, a third-transistor including a gate-electrode receiving a second clock-signal, a first-electrode receiving a first power-voltage, and a second-electrode connected to the first-output-terminal, a fourth-transistor including a gate-electrode receiving a third clock-signal, a first-electrode receiving the third clock-signal, and a second-electrode connected to a second-node, a fifth-transistor including a gate-electrode connected to the second-node, a first-electrode receiving a second power-voltage, and a second-electrode connected to the first-node, and a sixth-transistor including a gate-electrode connected to the first-node, a first-electrode receiving the second power-voltage, and a second-electrode connected to the second-node.

公开(公告)号：US20190266934A1

公开(公告)日：2019-08-29

申请号：US16268995

申请日：2019-02-06

Applicant: Samsung Display Co., Ltd.

Inventor： Jaemin SEONG ,  Kangnam KIM ,  Jae-Hyun PARK ,  Hyunwook LEE

IPC: G09G3/20

Abstract: A gate driver includes stages each including a first-transistor including a gate-electrode receiving an output-signal of one previous-stage or a vertical-start-signal as a first input-signal, a first-electrode receiving the first input-signal, and a second-electrode connected to a first-node, a second-transistor including a gate-electrode connected to the first-node, a first-electrode receiving a first clock-signal, and a second-electrode connected to a first-output-terminal, a third-transistor including a gate-electrode receiving a second clock-signal, a first-electrode receiving a first power-voltage, and a second-electrode connected to the first-output-terminal, a fourth-transistor including a gate-electrode receiving a third clock-signal, a first-electrode receiving the third clock-signal, and a second-electrode connected to a second-node, a fifth-transistor including a gate-electrode connected to the second-node, a first-electrode receiving a second power-voltage, and a second-electrode connected to the first-node, and a sixth-transistor including a gate-electrode connected to the first-node, a first-electrode receiving the second power-voltage, and a second-electrode connected to the second-node.

公开(公告)号：US20180005594A1

公开(公告)日：2018-01-04

申请号：US15445025

申请日：2017-02-28

Applicant: Samsung Display Co., Ltd.

Inventor： Noboru TAKEUCHI ,  Jonghwan LEE ,  Kangnam KIM ,  Beomjun KIM ,  Hongwoo LEE ,  Youmee HYUN

IPC: G09G3/36 ,  G02F1/1335 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: G09G3/3677 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/123 ,  G09G2310/0286 ,  G09G2310/08

Abstract: A display device with space for accommodating elements of a gate driver in a display area of the display device, the display device including first and second adjacent pixel electrodes, and third and fourth adjacent pixel electrodes; a gate line extending between the first pixel electrode and the second pixel electrode and between the third pixel electrode and the fourth pixel electrode; a gate driver having a plurality of elements and configured to drive the gate line; and a light blocking layer overlapping the gate line, wherein the light blocking layer comprises a first light blocking portion and a second light blocking portion, the first light blocking portion is adjacent to the first pixel electrode and the second pixel electrode, the second light blocking portion is adjacent to the third pixel electrode and the fourth pixel electrode, the second light blocking portion having a larger size than a size of the first light blocking portion, and at least one of the plurality of elements of the gate driver overlaps the second light blocking portion.

公开(公告)号：US20160322015A1

公开(公告)日：2016-11-03

申请号：US15098078

申请日：2016-04-13

Applicant: Samsung Display Co., Ltd.

Inventor： Kangnam KIM ,  Duc-han CHO ,  Youmee HYUN

IPC: G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G09G2310/0286 ,  G11C19/184 ,  G11C19/28

Abstract: An n-th driving stage of a gate driving circuit includes a first control transistor being configured to increase a voltage of a first node to a first voltage, a control capacitor having one end connected to the first node, a second control transistor being configured to increase the first voltage of the first node to a second voltage that is higher than the first voltage, a third control transistor being configured to increase a voltage of a second node to a third voltage when being turned on according to the voltage applied to the first node, and an output transistor being configured to output a gate signal of the n-th driving stage when being turned on according to the voltage applied to the second node.

Abstract translation: 栅极驱动电路的第n驱动级包括：第一控制晶体管，其被配置为将第一节点的电压增加到第一电压;控制电容器，其一端连接到第一节点;第二控制晶体管，被配置为 将第一节点的第一电压增加到高于第一电压的第二电压，第三控制晶体管被配置为根据施加到第一电压的电压在接通时将第二节点的电压增加到第三电压 节点，以及输出晶体管，被配置为根据施加到第二节点的电压而导通第n个驱动级的栅极信号。