Method of decomposing layout of semiconductor device
    2.
    发明授权
    Method of decomposing layout of semiconductor device 有权
    分解半导体器件布局的方法

    公开(公告)号:US08930859B2

    公开(公告)日:2015-01-06

    申请号:US13944194

    申请日:2013-07-17

    Inventor: Sung-Gon Jung

    Abstract: Embodiments relate to a method of decomposing a layout of a semiconductor device. The method may include generating a pattern layout including first patterns and second patterns, generating an interference map for the pattern layout, the interference map including optical interference information regarding the first and second patterns, and decomposing the pattern layout into a first decomposition pattern layout including the first patterns, and a second decomposition pattern layout including the second patterns, based on the interference map. In the interference map, an influence of constructive interference on the first patterns may be greater than an influence of constructive interference on the second patterns.

    Abstract translation: 实施例涉及分解半导体器件的布局的方法。 该方法可以包括生成包括第一图案和第二图案的图案布局,产生用于图案布局的干涉图,干涉图包括关于第一和第二图案的光学干涉信息,以及将图案布局分解为第一分解图案布局,包括 第一图案,以及包括第二图案的第二分解图案布局。 在干涉图中,建构性干扰对第一种模式的影响可能大于建构性干扰对第二种模式的影响。

Patent Agency Ranking