公开(公告)号：US20230145187A1

公开(公告)日：2023-05-11

申请号：US17980728

申请日：2022-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dokyung LIM ,  Wooseok KIM ,  Wonsik YU ,  Chanyoung JEONG

IPC: H01L27/02 ,  H01L27/118

CPC classification number: H01L27/0207 ,  H01L27/11807 ,  H01L2027/11875 ,  H01L2027/11881

Abstract: An integrated circuit device includes a substrate, and a unit cell on the substrate. The unit cell defines a unit cell area including at least two discrete devices. The unit cell includes a routing layer configured to route a signal and a voltage to the at least two discrete devices, the routing layer including a signal line and a voltage line extending in a first direction, and the signal line and the voltage line spaced apart from each other in a second direction, and a metal line stack including metal lines stacked between the unit cell area and the routing layer in the first direction. A plurality of contact vias are each configured to connect at least two adjacent ones of the signal line, the voltage line, the metal lines and the at least two discrete devices, in a third direction.

公开(公告)号：US20240235476A1

公开(公告)日：2024-07-11

申请号：US18400098

申请日：2023-12-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dokyung LIM ,  Junhyeok YANG ,  Chanyoung JEONG

IPC: H03B5/12

CPC classification number: H03B5/1212 ,  H03B2200/0082

Abstract: A device includes an oscillator including at least one inductor and at least one capacitor and configured to generate, based on a positive supply voltage, an output signal oscillating in a resonance frequency of the at least one inductor and the at least one capacitor. The device further includes an oscillation detector configured to determine whether the output signal oscillates based on a clock signal and increase a loop gain of the oscillator until the output signal oscillates.

公开(公告)号：US20240267037A1

公开(公告)日：2024-08-08

申请号：US18431449

申请日：2024-02-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chanyoung JEONG ,  Jaehyouk CHOI ,  Junhyeok YANG ,  Suneui PARK

IPC: H03K5/00 ,  H03K3/03 ,  H03K5/14 ,  H03K19/20

CPC classification number: H03K5/00006 ,  H03K3/0315 ,  H03K5/14 ,  H03K2005/00078 ,  H03K19/20

Abstract: A frequency multiplier includes a first ring oscillator, a second ring oscillator that is turned on complementarily to the first ring oscillator, a combining circuit that combines a first output signal of the first ring oscillator and a second output signal of the second ring oscillator to generate a final output signal, and a calibration circuit that corrects a discontinuous pulse included in the final output signal based on feedback of the final output signal.

公开(公告)号：US20230082930A1

公开(公告)日：2023-03-16

申请号：US17943932

申请日：2022-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dokyung LIM ,  Sounghun SHIN ,  Wooseok KIM ,  Wonsik YU ,  Chanyoung JEONG

IPC: H04L7/033 ,  H04L43/087

Abstract: A monitoring circuit for a high frequency signal includes: a phase locked loop configured to generate a divided output signal with respect to an input signal based on a plurality of dividers; a plurality of dividing monitoring circuits configured to receive dividing input signals and dividing output signals respectively corresponding to the plurality of dividers, and output dividing error signals; and a jitter monitoring circuit configured to output a jitter error signal.