公开(公告)号：US09419072B2

公开(公告)日：2016-08-16

申请号：US13915284

申请日：2013-06-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chongkwang Chang ,  Youngjoon Moon ,  Duck-nam Kim ,  Yeong-Jong Jeong

IPC: H01L21/336 ,  H01L29/04 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/8238 ,  H01L29/49

CPC classification number: H01L29/04 ,  H01L21/28247 ,  H01L21/32137 ,  H01L21/32138 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4232 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.

公开(公告)号：US20160056259A1

公开(公告)日：2016-02-25

申请号：US14933537

申请日：2015-11-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chongkwang Chang ,  Youngjoon Moon ,  Duck-nam Kim ,  Yeong-Jong Jeong

IPC: H01L29/51 ,  H01L29/423

CPC classification number: H01L29/04 ,  H01L21/28247 ,  H01L21/32137 ,  H01L21/32138 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4232 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.

公开(公告)号：US20160099185A1

公开(公告)日：2016-04-07

申请号：US14854528

申请日：2015-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chongkwang Chang ,  Sungwoo Kang ,  Chunghowan Kim ,  Youngmook Oh ,  Seobum Lee ,  Gahyun Lim

IPC: H01L21/66 ,  H01L21/308

CPC classification number: H01L22/20 ,  H01L21/3085 ,  H01L22/12 ,  H01L27/1104

Abstract: A method of controlling an etching process for forming fine patterns of a semiconductor device includes forming a lower pattern having a plurality of openings on a substrate, obtaining a width value of the lower pattern, and controlling a process recipe of an etching process for forming the lower pattern by using the width value.

Abstract translation: 一种控制用于形成半导体器件精细图案的蚀刻工艺的方法包括在衬底上形成具有多个开口的下部图案，获得下部图案的宽度值，以及控制用于形成 使用宽度值降低图案。

公开(公告)号：US09608054B2

公开(公告)日：2017-03-28

申请号：US14933537

申请日：2015-11-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chongkwang Chang ,  Youngjoon Moon ,  Duck-nam Kim ,  Yeong-Jong Jeong

IPC: H01L29/04 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/51 ,  H01L29/49

CPC classification number: H01L29/04 ,  H01L21/28247 ,  H01L21/32137 ,  H01L21/32138 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4232 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.

公开(公告)号：US09397013B2

公开(公告)日：2016-07-19

申请号：US14854528

申请日：2015-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chongkwang Chang ,  Sungwoo Kang ,  Chunghowan Kim ,  Youngmook Oh ,  Seobum Lee ,  Gahyun Lim

IPC: H01L21/00 ,  H01L21/66 ,  H01L21/308

CPC classification number: H01L22/20 ,  H01L21/3085 ,  H01L22/12 ,  H01L27/1104

Abstract: A method of controlling an etching process for forming fine patterns of a semiconductor device includes forming a lower pattern having a plurality of openings on a substrate, obtaining a width value of the lower pattern, and controlling a process recipe of an etching process for forming the lower pattern by using the width value.

Abstract translation: 一种控制用于形成半导体器件精细图案的蚀刻工艺的方法包括在衬底上形成具有多个开口的下部图案，获得下部图案的宽度值，以及控制用于形成 使用宽度值降低图案。

公开(公告)号：US12266668B2

公开(公告)日：2025-04-01

申请号：US17643938

申请日：2021-12-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chongkwang Chang ,  Donghoon Khang ,  Jinyoung Kim ,  Kwangyoung Oh ,  Taehun Lee

IPC: H01L27/146

Abstract: An image sensor includes a substrate having first and second surfaces. A separation structure penetrates the substrate. Photoelectric conversion device regions are spaced apart from each other in the substrate. Color filters are disposed on the second surface of the substrate. Microlenses are disposed on the color filters. The separation structure includes lower and upper separation patterns, first line portions that run parallel to each other, and second line portions that perpendicularly intersect the first line portions. An upper surface of the lower separation pattern or a lower surface of the upper separation pattern has a wavy or sawtooth shape. In intersecting regions in which the first line portions and the second line portions intersect, a vertical length of one of the lower separation pattern and the upper separation pattern is about 2 to 10 times greater than a vertical length of the other.

公开(公告)号：US20230064084A1

公开(公告)日：2023-03-02

申请号：US17866805

申请日：2022-07-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MINHWAN JEON ,  Chanho Park ,  Kyung Rae Byun ,  Chang Kyu Lee ,  Chongkwang Chang

IPC: H01L27/146

Abstract: An image sensor including: a semiconductor substrate including a plurality of pixel regions; an anti-reflection layer on the semiconductor substrate; color filters provided on the anti-reflection layer and in the pixel regions; and a fence structure disposed between adjacent ones of the color filters, wherein the fence structure includes: a lower portion penetrating the anti-reflection layer; an upper portion on the anti-reflection layer; and an intermediate portion between the lower portion and the upper portion, wherein the fence structure has undercut regions, which are provided at both sides of the intermediate portion and are between the upper portion of the fence structure and a top surface of the anti-reflection layer.

公开(公告)号：US20130270569A1

公开(公告)日：2013-10-17

申请号：US13915284

申请日：2013-06-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chongkwang Chang ,  Youngjoon Moon ,  Duck-nam Kim ,  Yeong-Jong Jeong

IPC: H01L29/04

CPC classification number: H01L29/04 ,  H01L21/28247 ,  H01L21/32137 ,  H01L21/32138 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4232 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.

Abstract translation: 半导体器件及其制造方法包括依次堆叠在半导体衬底上的半导体衬底，高k电介质图案和含金属图案，包括多晶半导体并设置在含金属图案上的栅极图案， 以及设置在所述栅极图案上的保护层，其中所述保护层包括所述多晶半导体的氧化物，氮化物和/或氧氮化物。