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公开(公告)号:US09841672B2
公开(公告)日:2017-12-12
申请号:US14690073
申请日:2015-04-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dae-Kwon Kang , Jae-Seok Yang , Sung-Wook Hwang , Dong-Gyun Kim , Ji-Young Jung
CPC classification number: G03F1/70 , G03F7/70433 , G03F7/70466
Abstract: A method of decomposing a layout of a semiconductor device for a quadruple patterning technology (QPT) process includes dividing the layout of the semiconductor device into a first temporary pattern, which includes rectangular features having a rectangular shape, and a second temporary pattern, which includes cross couple features having a Z-shape, generating a third temporary pattern and a fourth temporary pattern by performing a pattern dividing operation on the first temporary pattern in a first direction, generating a first target pattern and a second target pattern by incorporating each of the cross couple features included in the second temporary pattern into one of the third temporary pattern and the fourth temporary pattern, and generating first through fourth decomposed patterns by performing the pattern dividing operation on the first target pattern and the second target pattern in a second direction.
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公开(公告)号:US09874810B2
公开(公告)日:2018-01-23
申请号:US15135041
申请日:2016-04-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ji-Young Jung , Dae-Kwon Kang , Dong-Gyun Kim , Jae-Seok Yang , Sung-Wook Hwang
Abstract: A layout decomposition method is provided which may include building, a graph including a plurality of nodes and edges from a layout design including a plurality of polygons, wherein the nodes correspond to the polygons of the layout design and the edges identify two nodes disposed close to each other at a distance shorter than a minimum distance among the plurality of nodes, comparing degrees of the plurality of nodes with a reference value, selecting a target node, the degree of which exceeds the reference value, identifying a first and second subgraph based on the target node, performing multi-patterning technology decomposition on the first and second subgraph to acquire a first and second result, and creating first mask layout data corresponding to one portion of the layout design and second mask layout data corresponding to the other portion of the layout design by combining the first and second result.
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公开(公告)号:US09836565B2
公开(公告)日:2017-12-05
申请号:US14824529
申请日:2015-08-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dae-Kwon Kang
IPC: G06F17/50
CPC classification number: G06F17/5022 , G06F17/5045 , G06F17/505
Abstract: Provided are an electronic design automation apparatus and method. The electronic design automation method includes: loading, by a processor, a rule file having limitations on a reference design file; extracting, by the processor, a plurality of unit operations for respectively performing the limitations from the loaded file; and automatically forming, by the processor, a flowchart corresponding to the rule file based on relations between the plurality of unit operations.
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公开(公告)号:US09652578B2
公开(公告)日:2017-05-16
申请号:US14674416
申请日:2015-03-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dong-Gyun Kim , Sung-Wook Hwang , Dae-Kwon Kang , Jae-Seok Yang , Ji-Young Jung
IPC: G06F17/50 , H01L27/02 , H01L21/308
CPC classification number: G06F17/5081 , G06F17/5063 , G06F17/5068 , H01L21/3086 , H01L27/0207
Abstract: A layout design method may include receiving predetermined values related to first to third normal fin designs extending in a first direction and arranged in parallel in a second direction perpendicular to the first direction, generating dummy fin designs based on the predetermined values, generating mandrel candidate designs based on the first to third normal fin designs and the dummy fin designs, decomposing the mandrel candidate designs to first and second mandrel mask designs, and generating a final mandrel mask design using one of the first and second mandrel mask designs that satisfies a predetermined condition. A first interval distance in the second direction between the first normal fin design and the second normal fin design may be different from a second interval distance in the second direction between the second normal fin design and the third normal fin design.
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