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    Semiconductor device
    1.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10224331B2

    公开(公告)日：2019-03-05

    申请号：US15911922

    申请日：2018-03-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Raheel Azmat ,  Deepak Sharma ,  Su-Hyeon Kim ,  Chulhong Park

    IPC: H01L27/092 ,  H01L29/06 ,  H01L27/02 ,  H01L27/118 ,  H01L29/775

    Abstract: Provided is a semiconductor device including a substrate with first, second, and third logic cells, active patterns provided in each of the first to third logic cells to protrude from the substrate, and gate structures crossing the active patterns. The second and third logic cells are spaced apart from each other in a first direction with the first logic cell interposed therebetween. The active patterns are arranged in the first direction and extend in a second direction crossing the first direction. When measured in the first direction, a distance between the closest adjacent pair of the active patterns with each in the first and second logic cells respectively is different from that between the closest pair of the active patterns with each in the first and third logic cells respectively.

    Integrated circuit and standard cell library
    3.
    发明授权
    Integrated circuit and standard cell library 有权

    公开(公告)号：US11316032B2

    公开(公告)日：2022-04-26

    申请号：US16887331

    申请日：2020-05-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Deepak Sharma ,  Hyun-jong Lee ,  Raheel Azmat ,  Chul-hong Park ,  Sang-jun Park

    IPC: H01L29/66 ,  H01L27/088 ,  H01L27/02 ,  H01L23/528 ,  H01L27/092 ,  H01L21/8238

    Abstract: Provided is an integrated circuit including at least one cell, the at least one cell includes first and second active regions spaced apart from each other, a dummy region disposed between the first and second active regions, at least one first active fin disposed in the first active region and extending in a first direction, at least one second active fin extending along the first direction over the entire length of the second active region, and an active gate line extending in a second direction that is substantially perpendicular to the first direction, wherein the active gate line vertically overlaps the first active region and the dummy region and does not vertically overlap the second active region.

    Integrated circuit (IC) devices including cross gate contacts
    4.
    发明授权
    Integrated circuit (IC) devices including cross gate contacts 有权

    公开(公告)号：US10546855B2

    公开(公告)日：2020-01-28

    申请号：US15473913

    申请日：2017-03-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Rajeev Ranjan ,  Deepak Sharma ,  Subhash Kuchanuri ,  Chul Hong Park ,  Jae Seok Yang ,  Kwan Young Chun

    IPC: H01L27/088 ,  H01L23/528 ,  H01L27/02 ,  H01L29/06 ,  H01L27/092 ,  H01L23/522

    Abstract: Integrated circuit devices are provided. The IC devices may include an active region extending in a first direction, first and second gate electrodes extending in a second direction, a first impurity region in the active region adjacent a first side of the first gate electrode, a second impurity region in the active region between a second side of the first gate electrode and a first side of the second gate electrode, a third impurity region in the active region adjacent a second side of the second gate electrode, a cross gate contact electrically connecting the first and second impurity regions, a first contact electrically connected to the third impurity region, a first wire electrically connected to the cross gate contact, and a second wire electrically connected to the first contact. The first and second wires may extend only in the first direction and may be on the same line.

    Integrated circuit and standard cell library
    5.
    发明授权
    Integrated circuit and standard cell library 有权

    公开(公告)号：US10720429B2

    公开(公告)日：2020-07-21

    申请号：US16390431

    申请日：2019-04-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Deepak Sharma ,  Hyun-jong Lee ,  Raheel Azmat ,  Chul-hong Park ,  Sang-jun Park

    IPC: H01L27/088 ,  H01L27/02 ,  H01L23/528 ,  H01L27/092 ,  H01L29/66 ,  H01L21/8238

    Abstract: Provided is an integrated circuit including at least one cell, the at least one cell includes first and second active regions spaced apart from each other, a dummy region disposed between the first and second active regions, at least one first active fin disposed in the first active region and extending in a first direction, at least one second active fin extending along the first direction over the entire length of the second active region, and an active gate line extending in a second direction that is substantially perpendicular to the first direction, wherein the active gate line vertically overlaps the first active region and the dummy region and does not vertically overlap the second active region.

    Integrated circuit and standard cell library
    8.
    发明授权
    Integrated circuit and standard cell library 有权

    公开(公告)号：US10297596B2

    公开(公告)日：2019-05-21

    申请号：US15496507

    申请日：2017-04-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Deepak Sharma ,  Hyun-jong Lee ,  Raheel Azmat ,  Chul-hong Park ,  Sang-jun Park

    IPC: H01L27/088 ,  H01L27/02 ,  H01L23/528 ,  H01L27/092 ,  H01L29/66 ,  H01L21/8238

    Abstract: Provided is an integrated circuit including at least one cell, the at least one cell includes first and second active regions spaced apart from each other, a dummy region disposed between the first and second active regions, at least one first active fin disposed in the first active region and extending in a first direction, at least one second active fin extending along the first direction over the entire length of the second active region, and an active gate line extending in a second direction that is substantially perpendicular to the first direction, wherein the active gate line vertically overlaps the first active region and the dummy region and does not vertically overlap the second active region.

    Integrated circuit devices
    9.
    发明授权
    Integrated circuit devices 有权

    公开(公告)号：US10249605B2

    公开(公告)日：2019-04-02

    申请号：US15655125

    申请日：2017-07-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kuchanuri Subhash ,  Rastogi Sidharth ,  Deepak Sharma ,  Chul-hong Park ,  Jae-seok Yang

    IPC: H01L27/02 ,  H01L23/528 ,  H01L27/118 ,  H01L27/11 ,  H01L27/105 ,  H03K19/00

    Abstract: An integrated circuit (IC) device includes at least one standard cell. The at least one standard cell includes: first and second active regions respectively disposed on each of two sides of a dummy region, the first and second active regions having different conductivity types and extending in a first direction; first and second gate lines extending parallel to each other in a second direction perpendicular to the first direction across the first and second active regions, a first detour interconnection structure configured to electrically connect the first gate line with the second gate line; and a second detour interconnection structure configured to electrically connect the second gate line with the first gate line. The first and second detour interconnection structures include a lower interconnection layer extending in the first direction, an upper interconnection layer extending in the second direction, and a contact via.

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