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公开(公告)号:US20240355637A1
公开(公告)日:2024-10-24
申请号:US18476390
申请日:2023-09-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: John Soo Kim , Gwan Ho Kim , Ji Yoon Kim , Heung Sik Park , Keun Hee Bai , Jong Min Baek , Do Haing Lee , Jong Sun Lee
IPC: H01L21/32 , H01L21/02 , H01L21/027 , H01L21/033 , H01L21/3065 , H01L21/768
CPC classification number: H01L21/32 , H01L21/0228 , H01L21/0271 , H01L21/0332 , H01L21/0337 , H01L21/3065 , H01L21/76831
Abstract: A for fabricating a semiconductor device comprises forming a mask layer on a substrate, the mask layer defining a through hole that exposes an upper surface of the substrate, the mask layer comprising a first mask layer and a second mask layer, wherein the second mask layer is between the substrate and the first mask layer, and wherein the second mask layer comprises carbon. The method includes forming a liner layer on side walls of the through hole inside the second mask layer.
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公开(公告)号:US20220109055A1
公开(公告)日:2022-04-07
申请号:US17318079
申请日:2021-05-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won Hyuk Lee , Jong Chul Park , Sang Duk Park , Hong Sik Shin , Do Haing Lee
IPC: H01L29/417 , H01L29/78 , H01L29/66
Abstract: A semiconductor device includes, first and second source/drain patterns on an active pattern and spaced apart from each other, a first source/drain contact on the first source/drain pattern and including a first source/drain barrier film and a first source/drain filling film on the first source/drain barrier film, a second source/drain contact on the second source/drain pattern, and a gate structure on the active pattern between the first and second source/drain contacts and including a gate electrode, wherein a top surface of the first source/drain contact is lower than a top surface of the gate structure, and a height from a top surface of the active pattern to a top surface of the first source/drain barrier film is less than a height from the top surface of the active pattern to a top surface of the first source/drain filling film.
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公开(公告)号:US20240072140A1
公开(公告)日:2024-02-29
申请号:US18502324
申请日:2023-11-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won Hyuk Lee , Jong Chul Park , Sang Duk Park , Hong Sik Shin , Do Haing Lee
IPC: H01L29/417 , H01L23/485 , H01L23/522 , H01L23/528 , H01L29/66 , H01L29/78
CPC classification number: H01L29/41791 , H01L23/485 , H01L23/5226 , H01L23/5283 , H01L29/66795 , H01L29/785
Abstract: A semiconductor device includes, first and second source/drain patterns on an active pattern and spaced apart from each other, a first source/drain contact on the first source/drain pattern and including a first source/drain barrier film and a first source/drain filling film on the first source/drain barrier film, a second source/drain contact on the second source/drain pattern, and a gate structure on the active pattern between the first and second source/drain contacts and including a gate electrode, wherein a top surface of the first source/drain contact is lower than a top surface of the gate structure, and a height from a top surface of the active pattern to a top surface of the first source/drain barrier film is less than a height from the top surface of the active pattern to a top surface of the first source/drain filling film.
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公开(公告)号:US11848364B2
公开(公告)日:2023-12-19
申请号:US17318079
申请日:2021-05-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won Hyuk Lee , Jong Chul Park , Sang Duk Park , Hong Sik Shin , Do Haing Lee
IPC: H01L29/417 , H01L29/66 , H01L29/78 , H01L23/522 , H01L23/485 , H01L23/528
CPC classification number: H01L29/41791 , H01L23/485 , H01L23/5226 , H01L23/5283 , H01L29/66795 , H01L29/785
Abstract: A semiconductor device includes, first and second source/drain patterns on an active pattern and spaced apart from each other, a first source/drain contact on the first source/drain pattern and including a first source/drain barrier film and a first source/drain filling film on the first source/drain barrier film, a second source/drain contact on the second source/drain pattern, and a gate structure on the active pattern between the first and second source/drain contacts and including a gate electrode, wherein a top surface of the first source/drain contact is lower than a top surface of the gate structure, and a height from a top surface of the active pattern to a top surface of the first source/drain barrier film is less than a height from the top surface of the active pattern to a top surface of the first source/drain filling film.
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