公开(公告)号：US11910611B2

公开(公告)日：2024-02-20

申请号：US17507989

申请日：2021-10-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong Hoon Jang ,  Woo Sung Yang ,  Joon Sung Lim ,  Sung Min Hwang

IPC: H10B43/40 ,  H01L23/522 ,  H10B43/27 ,  H10B43/10

CPC classification number: H10B43/40 ,  H01L23/5226 ,  H10B43/10 ,  H10B43/27

Abstract: A nonvolatile memory device includes a substrate including a cell region and a peripheral circuit region, a stacked structure on the cell region, the stacked structure including a plurality of gate patterns separated from each other and stacked sequentially, a semiconductor pattern connected to the substrate through the stacked structure, a peripheral circuit element on the peripheral circuit region, a first interlayer insulating film on the cell region and the peripheral circuit region, the first interlayer insulating film covering the peripheral circuit element, and a lower contact connected to the peripheral circuit element through the first interlayer insulating film, a height of a top surface of the lower contact being lower than or equal to a height of a bottom surface of a lowermost gate pattern of the plurality of gate patterns on the first interlayer insulating film.

公开(公告)号：US20200176464A1

公开(公告)日：2020-06-04

申请号：US16512513

申请日：2019-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong Hoon Jang ,  Woo Sung YANG ,  Joon Sung LIM ,  Sung Min HWANG

IPC: H01L27/11573 ,  H01L27/11582 ,  H01L23/522 ,  H01L27/11565

Abstract: A nonvolatile memory device includes a substrate including a cell region and a peripheral circuit region, a stacked structure on the cell region, the stacked structure including a plurality of gate patterns separated from each other and stacked sequentially, a semiconductor pattern connected to the substrate through the stacked structure, a peripheral circuit element on the peripheral circuit region, a first interlayer insulating film on the cell region and the peripheral circuit region, the first interlayer insulating film covering the peripheral circuit element, and a lower contact connected to the peripheral circuit element through the first interlayer insulating film, a height of a top surface of the lower contact being lower than or equal to a height of a bottom surface of a lowermost gate pattern of the plurality of gate patterns on the first interlayer insulating film.

公开(公告)号：US10303933B2

公开(公告)日：2019-05-28

申请号：US15658058

申请日：2017-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo Yong Lee ,  Dong Hoon Jang ,  Dae Hyun Sung ,  Dae Hun An ,  Jong Hoon Won ,  Ki Huk Lee

IPC: G06K9/00

Abstract: Disclosed is a beauty effect processing apparatus that increases the effectiveness of a beauty effect applied to a face included in an image frame by selecting a protagonist, to which the beauty effect having a maximum sharpness is to be applied, from at least one received face image, and determining a beauty level corresponding to sharpness of the beauty effect to be applied to the received at least one face image based on at least one of a spaced distance from the protagonist and a face size of the received at least one face image relative to a face size of the protagonist.

公开(公告)号：US20180032797A1

公开(公告)日：2018-02-01

申请号：US15658058

申请日：2017-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo Yong LEE ,  Dong Hoon Jang ,  Dae Hyun Sung ,  Dae Hun An ,  Jong Hoon Won ,  Ki Huk Lee

IPC: G06K9/00

CPC classification number: G06K9/00288 ,  G06K9/00228 ,  G06K9/00275

Abstract: Disclosed is a beauty effect processing apparatus that increases the effectiveness of a beauty effect applied to a face included in an image frame by selecting a protagonist, to which the beauty effect having a maximum sharpness is to be applied, from at least one received face image, and determining a beauty level corresponding to sharpness of the beauty effect to be applied to the received at least one face image based on at least one of a spaced distance from the protagonist and a face size of the received at least one face image relative to a face size of the protagonist.