公开(公告)号：US20180261555A1

公开(公告)日：2018-09-13

申请号：US15850336

申请日：2017-12-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Rae CHO ,  Sundae KIM ,  Hyunggil Baek ,  Namgyu BAEK ,  Seunghun SHIN ,  Donghoon WON

IPC: H01L23/00 ,  H01L21/78 ,  H01L21/02

Abstract: A method of dividing a substrate includes preparing a substrate including a crystalline semiconductor layer having a scribe lane region and device regions, a dielectric layer on the crystalline semiconductor layer, and a partition structure in physical contact with the dielectric layer and provided on the scribe lane region of the crystalline semiconductor layer, forming an amorphous region in the crystalline semiconductor layer, and performing a grinding process on the crystalline semiconductor layer after the forming of the amorphous region. The amorphous region is formed in the scribe lane region of the crystalline semiconductor layer.

公开(公告)号：US20190355671A1

公开(公告)日：2019-11-21

申请号：US16530993

申请日：2019-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Rae CHO ,  Sundae KIM ,  HYUNGGIL BAEK ,  Namgyu BAEK ,  Seunghun SHIN ,  Donghoon WON

IPC: H01L23/00 ,  H01L21/78 ,  H01L23/58 ,  H01L21/02

Abstract: A method of dividing a substrate includes preparing a substrate including a crystalline semiconductor layer having a scribe lane region and device regions, a dielectric layer on the crystalline semiconductor layer, and a partition structure in physical contact with the dielectric layer and provided on the scribe lane region of the crystalline semiconductor layer, forming an amorphous region in the crystalline semiconductor layer, and performing a grinding process on the crystalline semiconductor layer after the forming of the amorphous region. The amorphous region is formed in the scribe lane region of the crystalline semiconductor layer.

公开(公告)号：US20230034015A1

公开(公告)日：2023-02-02

申请号：US17938344

申请日：2022-10-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junyeong HEO ,  Unbyoung KANG ,  Donghoon WON

IPC: H01L23/528 ,  H01L23/48 ,  H01L21/78 ,  H01L21/3065

Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposing each other, and a side surface between the first and second surfaces, and including a device region on the first surface a wiring structure on the surface of the semiconductor substrate, and having a dielectric layer and a metal wiring in the dielectric layer and electrically connected to the device region, and an insulating material layer on a side surface of the wiring structure and having a side surface connected to the side surface of the semiconductor substrate. The side surface of the insulating material layer has a first wave-shaped pattern in which concave-convex portions are repeated in a direction of the wiring structure that is perpendicular to the semiconductor substrate, and the side surface of the semiconductor substrate has a second wave-shaped pattern in which concave-convex portions are repeated in the direction.

公开(公告)号：US20210125925A1

公开(公告)日：2021-04-29

申请号：US16886444

申请日：2020-05-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junyeong HEO ,  Unbyoung KANG ,  Donghoon WON

IPC: H01L23/528 ,  H01L21/3065 ,  H01L21/78 ,  H01L23/48

Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposing each other, and a side surface between the first and second surfaces, and including a device region on the first surface a wiring structure on the surface of the semiconductor substrate, and having a dielectric layer and a metal wiring in the dielectric layer and electrically connected to the device region, and an insulating material layer on a side surface of the wiring structure and having a side surface connected to the side surface of the semiconductor substrate. The side surface of the insulating material layer has a first wave-shaped pattern in which concave-convex portions are repeated in a direction of the wiring structure that is perpendicular to the semiconductor substrate, and the side surface of the semiconductor substrate has a second wave-shaped pattern in which concave-convex portions are repeated in the direction.

公开(公告)号：US20210050264A1

公开(公告)日：2021-02-18

申请号：US16871189

申请日：2020-05-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghoon WON ,  Jaeeun Lee ,  Yeongkwon Ko ,  Junyeong Heo

IPC: H01L21/78 ,  H01L21/268

Abstract: There is provided a method of dicing a semiconductor wafer, which includes providing a semiconductor substrate having a plurality of integrated circuit regions on an active surface of the semiconductor substrate, a dicing regions provided between adjacent integrated circuit regions of the plurality of integrated circuit regions, and a metal shield layer provided on the active surface across at least a portion of the adjacent integrated circuit regions and the dicing region, forming a modified layer by irradiating laser to an inside of the semiconductor substrate along the dicing region, propagating a crack from the modified layer in a direction perpendicular to a major-axial direction of the metal shield layer by polishing an inactive surface opposing the active surface of the semiconductor substrate and forming semiconductor chips by separating the adjacent integrated circuit regions, respectively, based on the crack propagating from the modified layer.