公开(公告)号：US11551996B2

公开(公告)日：2023-01-10

申请号：US17341463

申请日：2021-06-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongjoo Choi

IPC: H01L23/38 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00

Abstract: Semiconductor chips may include a substrate; a protective layer on a first surface of the substrate, through electrodes extending through the substrate and the protective layer, and a Peltier structure including first through structures including first conductivity type impurities, and second through structures including second conductivity type impurities, which may extend through the substrate and the protective layer; pads on the protective layer and connected to the through electrodes, respectively, first connection wires connecting respective first ends of the first through structures to respective first ends of the second through structures, and second connection wires connecting respective second ends of the first through structures to respective second ends of one of the second through structures. The first through structures and the second through structures may be alternately connected to each other in series by the first connection wires and the second connection wires.

公开(公告)号：US20250105193A1

公开(公告)日：2025-03-27

申请号：US18890118

申请日：2024-09-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jungmin Ko ,  Hyunhee Lee ,  Hojun Lee ,  Dongjoo Choi

IPC: H01L23/00 ,  H01L23/498 ,  H01L25/065 ,  H10B80/00

Abstract: A semiconductor package includes a first semiconductor chip including a first through-via and a first upper pad, a second semiconductor chip provided on the first semiconductor chip and including a second lower pad, and a bonding bump provided between the first semiconductor chip and the second semiconductor chip and connected to the first upper pad and the second lower pad. The bonding bump includes: a conductive pattern directly contacting the second lower pad and including nickel and a bonding structure directly contacting the conductive pattern and the first upper pad, wherein the bonding structure includes an intermetallic compound including copper and a solder material. A thickness of the bonding structure is from about 47% to about 54% of a sum of a thickness of the conductive pattern, a thickness of the bonding structure, and a thickness of the first upper pad.

公开(公告)号：US11721604B2

公开(公告)日：2023-08-08

申请号：US16953745

申请日：2020-11-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dongjoo Choi ,  Seungduk Baek ,  Youngdeuk Kim

IPC: H01L29/40 ,  H01L25/065 ,  H01L23/532 ,  H01L23/31 ,  H01L23/367 ,  H01L23/522

CPC classification number: H01L23/367 ,  H01L23/5226 ,  H01L25/0657 ,  H01L2225/06513 ,  H01L2225/06589

Abstract: Provided is a semiconductor package including a lower semiconductor chip including a lower semiconductor substrate, a rear surface protecting layer covering a non-active surface of the lower semiconductor substrate, a plurality of lower via electrodes, and a plurality of rear surface signal pads and a plurality of rear surface thermal pads arranged on the rear surface protecting layer; an upper semiconductor chip including an upper semiconductor substrate, a wiring structure on an active surface of the upper semiconductor substrate, a front surface protecting layer that covers the wiring structure and has a plurality of front surface openings, and a plurality of signal vias and a plurality of thermal vias that fill the front surface openings; and a plurality of signal bumps connecting between the rear surface signal pads and the signal vias and a plurality of thermal bumps connecting between the rear surface thermal pads and the thermal vias.

公开(公告)号：US12080698B2

公开(公告)日：2024-09-03

申请号：US17569302

申请日：2022-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongjoo Choi

IPC: H01L25/18 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538

CPC classification number: H01L25/18 ,  H01L23/3185 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/5383 ,  H01L24/16 ,  H01L2224/16146 ,  H01L2224/16227

Abstract: A semiconductor package includes an interposer substrate; an upper semiconductor chip on a top surface of the interposer substrate, such that a bottom surface of the upper semiconductor chip faces the top surface of the interposer substrate, a chip stack on a bottom surface of the interposer substrate and including a plurality of stacked lower semiconductor chips, wherein each of the lower semiconductor chips includes a plurality of through vias therein, wherein a top surface of the chip stack faces the bottom surface of the interposer substrate, a molding layer that covers a sidewall of the chip stack, a sidewall of the interposer substrate, and a sidewall of the upper semiconductor chip, and a plurality of connection terminals disposed below a bottom surface of the chip stack opposite the top surface of the chip stack, and coupled to the through vias. The upper semiconductor chip is electrically connected through the interposer substrate to the through vias.

公开(公告)号：US11079895B2

公开(公告)日：2021-08-03

申请号：US14883940

申请日：2015-10-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dohy Hong ,  Kyungwhoon Cheun ,  Jisung Oh ,  Kiseok Lee ,  Dongjoo Choi

IPC: G06F3/0481 ,  G06F3/0484 ,  G06F3/0488

Abstract: The present disclosure relates to a sensor network, Machine Type Communication (MTC), Machine-to-Machine (M2M) communication, and technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the above technologies, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. A method of providing a user interface (UI) by an electronic device is provided. The method includes displaying a control UI, receiving a first drag input via the displayed control UI, and, when a direction of the first drag input corresponds to a first direction, displaying a cursor UI at a preset location. According to an embodiment of the present disclosure, a UI through which an electronic device can easily receive a user input may be provided.