INTEGRATED CIRCUIT INCLUDING CONNECTION LINE

    公开(公告)号:US20220189945A1

    公开(公告)日:2022-06-16

    申请号:US17545009

    申请日:2021-12-08

    Abstract: An integrated circuit includes: a first cell arranged in a first row extending in a first direction and performing a first function, a second cell arranged in the first row and performing a second function, a third cell arranged in a second row extending in the first direction and performing the first function, a fourth cell arranged in the second row and performing the second function, a first connection line connecting a first via in the first cell to a second via in the second cell, and a second connection line connecting a third via in the third cell to a fourth via in the fourth cell, wherein a length of the first connection line is different from a length of the second connection line.

    SEMICONDUCTOR DEVICES HAVING STANDARD CELLS THEREIN WITH IMPROVED INTEGRATION AND RELIABILITY

    公开(公告)号:US20210343699A1

    公开(公告)日:2021-11-04

    申请号:US17147567

    申请日:2021-01-13

    Abstract: A semiconductor device includes first and second standard cells having respective semiconductor elements and first interconnection lines electrically connected to the semiconductor elements, on a substrate. A routing structure is provided, which is disposed on the first and second standard cells. The routing structure includes second interconnection lines electrically connected to the first interconnection lines. The first interconnection lines include a first power transmission line, which is configured to supply power to a semiconductor element, and a first signal transmission line electrically coupled to a semiconductor element. The second interconnection lines include: (i) a second power transmission line electrically connected to the first power transmission line and extending by a first length, (ii) a second signal transmission line electrically connected to the first signal transmission line, and (iii) a staple line electrically connected to the first power transmission line, extending on a boundary between the first and second standard cells, and extending by a second length, less than the first length.

    Semiconductor device
    4.
    发明授权

    公开(公告)号:US11790146B2

    公开(公告)日:2023-10-17

    申请号:US17324829

    申请日:2021-05-19

    CPC classification number: G06F30/392 G06F30/394 G06F30/398

    Abstract: A semiconductor device including a standard cell is provided. The standard cell includes an active region; a gate structure intersecting the active region; a first conductive structure including: a first power supply line and a second power supply line; and a second conductive structure disposed on the first conductive structure, the second conductive structure including: first power distribution patterns spaced apart from each other a first boundary and electrically connected to the first power supply line, second power distribution patterns spaced apart from each other along a second boundary and electrically connected to the second power supply line, net metal lines disposed between and spaced apart from the first power distribution patterns and the second power distribution patterns, and electrically connected to a first portion of the signal lines, and pin metal lines electrically connected to a second portion of the signal lines.

    SEMICONDUCTOR DEVICE
    5.
    发明申请

    公开(公告)号:US20220092249A1

    公开(公告)日:2022-03-24

    申请号:US17324829

    申请日:2021-05-19

    Abstract: A semiconductor device including a standard cell is provided. The standard cell includes an active region; a gate structure intersecting the active region; a first conductive structure including: a first power supply line and a second power supply line; and a second conductive structure disposed on the first conductive structure, the second conductive structure including: first power distribution patterns spaced apart from each other a first boundary and electrically connected to the first power supply line, second power distribution patterns spaced apart from each other along a second boundary and electrically connected to the second power supply line, net metal lines disposed between and spaced apart from the first power distribution patterns and the second power distribution patterns, and electrically connected to a first portion of the signal lines, and pin metal lines electrically connected to a second portion of the signal lines.

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