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公开(公告)号：US20240164103A1
公开(公告)日：2024-05-16
申请号：US18418720
申请日：2024-01-22
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H10B43/27 , H01L23/498 , H01L23/522 , H01L23/535 , H01L29/40 , H01L29/423 , H10B43/10 , H10B43/20 , H10B43/50
CPC分类号： H10B43/27 , H01L23/49844 , H01L23/5226 , H01L23/535 , H01L29/408 , H01L29/4234 , H10B43/10 , H10B43/20 , H10B43/50 , H01L2924/0002
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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公开(公告)号：US20220059567A1
公开(公告)日：2022-02-24
申请号：US17517137
申请日：2021-11-02
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H01L27/11582 , H01L23/535 , H01L29/40 , H01L29/423 , H01L27/11578 , H01L23/522 , H01L27/11575 , H01L27/11565 , H01L23/498
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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公开(公告)号：US09245839B2
公开(公告)日：2016-01-26
申请号：US14027599
申请日：2013-09-16
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H01L29/792 , H01L23/498 , H01L27/115
CPC分类号： H01L27/11582 , H01L23/49844 , H01L23/5226 , H01L23/535 , H01L27/11565 , H01L27/11575 , H01L27/11578 , H01L29/408 , H01L29/4234 , H01L2924/0002 , H01L2924/00
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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公开(公告)号：US20220359566A1
公开(公告)日：2022-11-10
申请号：US17870037
申请日：2022-07-21
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H01L27/11582 , H01L27/11578 , H01L27/11575 , H01L23/498 , H01L23/535 , H01L29/40 , H01L29/423 , H01L23/522 , H01L27/11565
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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公开(公告)号：US20240155840A1
公开(公告)日：2024-05-09
申请号：US18416095
申请日：2024-01-18
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H10B43/27 , H01L23/498 , H01L23/522 , H01L23/535 , H01L29/40 , H01L29/423 , H10B43/10 , H10B43/20 , H10B43/50
CPC分类号： H10B43/27 , H01L23/49844 , H01L23/5226 , H01L23/535 , H01L29/408 , H01L29/4234 , H10B43/10 , H10B43/20 , H10B43/50 , H01L2924/0002
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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公开(公告)号：US20220037355A1
公开(公告)日：2022-02-03
申请号：US17497417
申请日：2021-10-08
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H01L27/11582 , H01L27/11578 , H01L27/11575 , H01L23/498 , H01L23/535 , H01L29/40 , H01L29/423 , H01L23/522 , H01L27/11565
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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公开(公告)号：US10546872B2
公开(公告)日：2020-01-28
申请号：US15634597
申请日：2017-06-27
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H01L27/11582 , H01L27/11578 , H01L27/11575 , H01L23/498 , H01L23/535 , H01L29/40 , H01L29/423 , H01L23/522 , H01L27/11565
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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公开(公告)号：US09735170B2
公开(公告)日：2017-08-15
申请号：US14973182
申请日：2015-12-17
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H01L29/788 , H01L27/11582 , H01L27/11578 , H01L23/498 , H01L27/11575 , H01L23/535 , H01L29/40 , H01L29/423
CPC分类号： H01L27/11582 , H01L23/49844 , H01L23/5226 , H01L23/535 , H01L27/11565 , H01L27/11575 , H01L27/11578 , H01L29/408 , H01L29/4234 , H01L2924/0002 , H01L2924/00
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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公开(公告)号：US11871571B2
公开(公告)日：2024-01-09
申请号：US17517137
申请日：2021-11-02
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H10B43/27 , H10B43/10 , H10B43/20 , H10B43/50 , H01L23/498 , H01L23/535 , H01L29/40 , H01L29/423 , H01L23/522
CPC分类号： H10B43/27 , H01L23/49844 , H01L23/5226 , H01L23/535 , H01L29/408 , H01L29/4234 , H10B43/10 , H10B43/20 , H10B43/50 , H01L2924/0002 , H01L2924/0002 , H01L2924/00
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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公开(公告)号：US11387249B2
公开(公告)日：2022-07-12
申请号：US16708482
申请日：2019-12-10
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H01L27/11582 , H01L27/11578 , H01L27/11575 , H01L23/498 , H01L23/535 , H01L29/40 , H01L29/423 , H01L23/522 , H01L27/11565
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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