公开(公告)号：US10666419B2

公开(公告)日：2020-05-26

申请号：US16108310

申请日：2018-08-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Ha Kim ,  Hwa Seok Oh ,  Jin Hyeok Choi ,  Jang-Hoon Chun

IPC: H04L7/00 ,  H03K5/24 ,  H03G1/00 ,  H03F3/45

Abstract: A semiconductor circuit including a clocked comparator and an offset application circuit. The clocked comparator is configured to receive a first input signal and a second input signal from a host and compare the first input signal and the second input signal. The offset application circuit is configured to apply an offset to the first input signal. The clocked comparator is configured to be driven based on a reference clock provided from the host.

公开(公告)号：US10013349B2

公开(公告)日：2018-07-03

申请号：US14875205

申请日：2015-10-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kui-Yon Mun ,  Hwa Seok Oh

IPC: G06F12/02 ,  G11C16/04 ,  G11C16/22 ,  G06F3/06

CPC classification number: G06F12/0292 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/202 ,  G06F2212/7207 ,  G11C16/0483 ,  G11C16/22 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method for operating a memory controller is provided. The method includes generating a pseudo random number by using a seed included in a stored seed group corresponding to a page to be currently programmed, wherein the stored seed group is stored among a plurality of seed groups. Data to be programmed into the current page is randomizing by using the pseudo random number and the memory controller outputs the randomized data. A solid state drive (SSD) or other memory storage device such as a memory card includes the memory controller and includes a read only memory (ROM) storing the plurality of seed groups. The memory controller includes a micro-processor and a read only memory (ROM) storing executable code for causing the micro-processor to access the plurality of stored seed groups and to select a seed therefrom corresponding to a page to be currently programmed.

公开(公告)号：US09348356B2

公开(公告)日：2016-05-24

申请号：US14025879

申请日：2013-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Pil Lee ,  Jin Hyeok Choi ,  Hwa Seok Oh ,  Young-Gyu Kang ,  Sung Ho Seo ,  Myung Sub Shin ,  Kyung Phil Yoo

IPC: G11C8/00 ,  G06F1/08 ,  G11C7/22 ,  G06F1/04 ,  G06F1/06

CPC classification number: G06F1/08 ,  G06F1/04 ,  G06F1/06 ,  G11C7/222

Abstract: An embedded multimedia card (eMMC) includes a clock channel that receives a clock signal from a host, a command channel that receives a command from the host, a plurality of data channels that transmit data to the host, and a return clock channel that transmits a return clock synchronized with the data to the host.

Abstract translation: 嵌入式多媒体卡（eMMC）包括从主机接收时钟信号的时钟信道，从主机接收命令的命令信道，向主机发送数据的多个数据信道以及发送数据的返回时钟信道 与数据同步的返回时钟到主机。

公开(公告)号：US09535451B2

公开(公告)日：2017-01-03

申请号：US14024655

申请日：2013-09-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Sub Shin ,  Sung Ho Seo ,  Kyung Phil Yoo ,  Jung Pil Lee ,  Hwa Seok Oh ,  Young Gyu Kang ,  Jun Ho Choi

IPC: G06F1/12 ,  G06F1/10

CPC classification number: G06F1/12 ,  G06F1/10

Abstract: An embedded multimedia card (eMMC) comprises a clock channel configured to receive a clock signal from a host, a command channel configured to receive a command from the host, a plurality of data channels configured to transmit data to the host, a data strobe channel configured to transmit a data strobe signal synchronized with the data to the host, and a data strobe control unit configured to selectively enable or generate the data strobe signal according to a protocol control signal.

Abstract translation: 嵌入式多媒体卡（eMMC）包括被配置为从主机接收时钟信号的时钟信道，被配置为从主机接收命令的命令信道，被配置为向主机发送数据的多个数据信道，数据选通信道 被配置为将与数据同步的数据选通信号发送到主机;以及数据选通控制单元，被配置为根据协议控制信号选择性地启用或生成数据选通信号。

公开(公告)号：US20190280848A1

公开(公告)日：2019-09-12

申请号：US16108310

申请日：2018-08-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Ha Kim ,  Hwa Seok Oh ,  Jin Hyeok Choi ,  Jung-Hoon Chun

IPC: H04L7/00 ,  H03F3/45 ,  H03G1/00 ,  H03K5/24

Abstract: A semiconductor circuit including a clocked comparator and an offset application circuit. The clocked comparator is configured to receive a first input signal and a second input signal from a host and compare the first input signal and the second input signal. The offset application circuit is configured to apply an offset to the first input signal. The clocked comparator is configured to be driven based on a reference clock provided from the host.